Project Logs

Collapse

• Accuracy

  Stephan • 08/05/2020 at 13:16 • 0 comments

  I've tried my best to _calibrate_ the NE555 to generate a 1 Hz clock. My oscilloscope was not precise enough for that, so I used a simple microcontroller setup based on the [NEO430](https://github.com/stnolting/neo430) to compare the NE555 clock against a Quartz-based reference clock. The deviation in _ms_ is printed via the processor's UART. After some fine tuning of the potentiometer I finally got a "good" 1 Hz clock from the NE555 and sealed the configuration with some nail polish.

  
  

  It's obvious that the NE555 is not the most precise clock generator on the block. The actual frequency is impacted by the voltage fluctuations and especially by the temperature of the time-defining components. I tested the clock on a warm summer day and after 24 hours I got a deviation of approx. +1800s or 30 minutes. Not good, not bad, but pretty moderate. So I think I will need to replace the NE555 by a more stable (Quartz) oscillator.

  I have tried to build a simple Quartz oscillator using two inverters, a 32kHz clock Quartz (obviously) and some resistors and capacitors. But unfortunately, I was not able to get it oscillating...
  

  Maybe anyone out there has a nice idea how to use some off-the-shelve CMOS chips to to the job.
  

  
  

• Final Assembly

  Stephan • 05/19/2020 at 18:11 • 0 comments

  The six counter modules have to be "programmed" according to their position. For example, the counter driving the 10^0 seconds displays always counts to 9 before overflowing. The 10^1 seconds display's counter module always counts to 5 and so... (anybody already wondering?)

  The powered up clock looks pretty nice - especially because you can see all the electronics and the fancy LEDs of t he carry chain. The whole clock requires about 95mA at 7V (due to the not-so-efficient 7805).

  To configure the time, the clock is paused via the enable switch of the clock. This module also has an reset button to clear all counter. After that, each digit can be increased by hitting the according module's increment button.

  Pictures:

• The Lord of Time (a.k.a. NE555)

  Stephan • 05/19/2020 at 17:33 • 1 comment

  What is the most elementary part of a clock? The clock source itself! Here we need some kind of oscillator with a stable and well-know frequency.

  There are a lot of oscillator circuits out there, but I wanted something simple, easy to build ad precise of course. I found some 10MHz oscillators ins my shelves, but the clock divider circuitry would be way too large (too much ICs). I also found a 32.768kHz crystal from an old kitchen clock. Just add a 15-bit counter (4x74161) and you get a nice 1Hz clock signal. Sounds good so far! I tried building a simple oscillator for the crystal based on an inverter and some resistors and tiny capacitors. Unfortunately, I was not able to get it oscillating (maybe a breadboard is not a good playground in this case). I had no dedicated oscillator chips for the Quartz available... so what do to?

  NE555 to the rescue! Oh dear, the good old NE555. I have used it in so many (not very time critical) projects. So why not use it for a clock?

  I am using a straight forward oscillator circuit for the NE555 here, but with an additional diode to have identical HIGH and LOW times. These times are defined by the capacitor (2x1µF Wima foil capacitors) and two potentiometers. I wrote a simple microcontroller program to measure the HIGH and LOW times so I can adjust the potentiometers to try to come as close as possible to 1Hz. Well, it worked - somehow. I fixed the potentiometers with some fancy nail polish. Of course the precision is not the best (e.g. thermal influence on the capacitors and resistors).

  Schematic:

  Pictures:

  
  

• Mother and Display Board

  Stephan • 05/18/2020 at 19:48 • 0 comments

  The clock module and the counter modules are plugged into the mother board. This board provides the power supply (based on a simple 7805) and takes care of the interconnection of all modules. The carry output of one counter module is connected to the carry input of the next one. Since the carry outs are low-active and the carry ins are high-active, an inverter (74HC04) is required between each stage.

  The outputs from the counter modules are brought to the display board. Each output pin as a pull-down resistor to prevent the display decoders from going crazy when a module is unplugged. Also, the carry out signals are terminated using pull-up resistors.

  
  As the name already suggests, the display board carries the six 7-segment displays and the BCD-to-7-segment decoders (74HC4511). The latches of the decoders are always transparent. Also, the decoder's lamp test or output enable features are not used. There are two LEDs between the HRS and MIN displays and between the MIN and SEC display. These LEDs are driven (via a transistor on the mother board) by the main clock signal to give the clock a nice radio clock look.

  Used logic chips:

  * 74HC04 (mother board)

  * 74HC4511 (display board)

  Schematics:

  Pictures:

• Counter modules done

  Stephan • 05/18/2020 at 18:37 • 0 comments

  Sometimes you really wish for a copy-and-paste function in real life...After what felt like an eternity I finally completed all six counter modules.

• Counter Module

  Stephan • 05/18/2020 at 18:18 • 0 comments

  The counter modules are the actual heart of the clock. There are six counter modules in total - one for each digit. All these counter modules are identical (I will come back to this "issue"...). They are based on 74HC161 binary counter. The counting range is defined via a 4-bit DIP switch, so each module can be configured to drive any of the displays. After reset or after an overflow, the counter starts counting at zero an counts until it reaches the "programmed" value again. I am using a 4-bit comparator based on 4 XOR2 gates (74HC86) and a final NOR4 gate (74HC4002).

  The output of this comparator is HIGH when the current counter state is equal to the value programmed via the DIP switches. The comparator output is connected to one input of a cheap AND2 gate (based on two diodes and a resistor). The other input of the cheap AND2 is driven by the module's carry input (CI).

  When the comparator detects a match AND the module's carry input is HIGH, the cheap AND2 outputs a HIGH level. This output is inverted by the second NOR4 gate and brought to the low-active parallel load input of the counter chip. Since this is a synchronous control signal, the counter is reset in the next clock cycle (all parallel input signals of the counter are tied to low). The signal driving the parallel load also represents the module's carry output, which is low-active (!CO). The status of the carry output is indicated by a red LED.

  The enable input of the counter chip is driven by a cheap OR2 (two diodes and a resistor). The first input is driven by the module's carry input (CI). The second input is driven by an on-board button, so the counter can be manually set (to define the initial time). There is no need for any kind of key debouncing, since the counter enable is only evaluated at a rising clock edge (which runs at 1Hz).

  Clock and reset signals of the counter chip are driven by the global reset (!RST) and clock (CLK) signals.
  
  

  Used logic chips:
  * 74HX161: 4-bit counter with synchronous parallel load
  * 74HC4002: Dual NOR4 gate
  * 74HC86: Quad XOR2 gate

  Schematic:
  

  Pictures:

View all 6 project logs