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Hack Chat Transcript, Part 2

A event log for Logic Simulation Hack Chat with Al Williams

The Truth (Table) Is Out There

dan-maloneyDan Maloney 03/02/2022 at 21:160 Comments


Al Williams12:27 PM
Well you'd think the functional would not care though.. but yeah so all your post synth work is useless once you go to ASIC and you have to start over

Al Williams12:28 PM
You know some of the FPGAs had a mux architecture not LUT

Al Williams12:28 PM
And that was like relay logic ...

Rob Weinstein12:28 PM
Change of topic: Do you have any recommendations for one of the graphical simulators like 'Logisim-evolution' or 'Digital' that can combine digital and analog simulation in the same design? For example, something that could simulate, say, 56-bit shift registers and serial adders and also control the build-up and collapse of inductors' current through the segments of an LED display. I'd like the running simulation to show the contents of the shifters zipping along and the LEDs responding to the inductor field collapse.

Al Williams12:28 PM
If you think relay logic is best with say switches in series for AND and in parallel for OR that's not very efficient. Turns out t hey are a mux and you can do anything with Mux

Al Williams12:29 PM
LTSpice can simulate digital:

Al Williams12:29 PM
oops

wrong link

Al Williams12:29 PM
Mux relay logic: http://tinyurl.com/h6ynfds

Al Williams12:29 PM
Or to be really perverse: Clever relay XOR: https://tinyurl.com/RelayXOR

Ethan Waldo12:29 PM
Nice! Something new to absorb!

Al Williams12:30 PM
I wonder if anyone has any favorites to share with Ron. I personally would try to do mixed using Spice. It isn't perfect but I know how to use it and it lets me get as analog as I want

RichardCollins12:30 PM
@Rob Weinstein You are best to write your own. Best of luck with your discussion. I have to go. This sounds like people who have known each other a long time.

Al Williams12:30 PM
But Flastad will do it. Qucs will too

Al Williams12:31 PM
As Richard says, you can write your own too

Al Williams12:31 PM
There are some python libs made for doing custom simulations but I don't know if any of them have analog or not

Al Williams12:31 PM
Not my link but this might be useful too

Survey: https://hackaday.com/2021/06/10/survey-of-simple-logic-simulators/

Al Williams12:32 PM
Just out of curiosity, how many of you have done at least one of the bootcamps?

Ethan Waldo12:33 PM
*crickets*

Al Williams12:33 PM
There was a 4th one that for now is the last one and wasn't well publicized too: 4th Bootcamp: https://hackaday.io/project/161493-fpga-boot-camp-4-state-machines

Al Williams12:33 PM
The state machines are fun because once you figure them out you realize everything is a state machine

Al Williams12:33 PM
in real life I mean

Ethan Waldo12:34 PM
I tend to find my abilities with state machines are severely limited by my own creativity. It's great to see examples of how other people are using them.

Al Williams12:34 PM
The classic is the traffic light: http://tinyurl.com/ycbpvv5x

Al Williams12:35 PM

https://hackaday.com/2015/08/13/becoming-a-state-machine-design-mastermind/

HACKADAY AL WILLIAMS

Becoming A State Machine Design Mastermind

Imagine a robot with an all-around bump sensor. The response to the bump sensor activating depends on the previous state of the robot. If it had been going forward, a bump will send it backwards and vice versa. This robot exhibits behavior that is easy to model as a state machine.

Read this on Hackaday

Al Williams12:36 PM
So what have you done with a state machine @Ethan Waldo ?

Ethan Waldo12:36 PM
Just the typical multi-cycle pipeline type stuff. Nothing that serious.

Al Williams12:37 PM
That's another case where you can describe flip flops or you can describe behavior and let tools generate for you

Ethan Waldo12:37 PM
Oh, and AWS Step Functions :P

Al Williams12:37 PM
Typical trade off... you CAN do a better job than the tools in theory but in practice you might not do a better job

Al Williams12:38 PM
One thing I see a lot in industry that I don't see much at hobby level is hardware in the loop simulation

Al Williams12:39 PM
In theory, though, we have the tools. For example, Digital has a way to add things to it from Java. So you could, say, send a PWM signal to real device using a serial port to talk to it.

Al Williams12:40 PM
So maybe you have a PWM-driven heater and a real thermistor and you simulate your controller for PID

Al Williams12:40 PM
Then at the end you build the real thing. We do that all the time using very expensive tools but it seems like it should be possible with tools we have in FOSS

Al Williams12:41 PM
Would be a cool feature for a mixed mode FOSS simulator like QUCs

Ethan Waldo12:41 PM
On the software-side of things I have previously written assembly-level tests that use GDB/MI to actually execute the software on the hardware and see what the registers and memory looks like.

Al Williams12:41 PM
Maybe @Will Kalman could simulate some student robots like that

Will Kalman12:42 PM
:)

Al Williams12:42 PM
Yah! running some code on the target and some on the host.

Al Williams12:43 PM
Speaking of robots that's when you need real mixed mode. Digital, analog, and mechanical. Wind River has a very expensive tool that can do that but I don't know of a FOSS/cheap alternative

salec12:45 PM
Is there some standard data exchange message format to connect simulators for various domains?

Al Williams12:45 PM
I am waiting for someone to do VR Spice... simulate your circuit in VR... fly along conductors.... watch current pulse through an inductor

Bil Herd12:46 PM
RFI fields

Al Williams12:46 PM
@salec not that I know of... that would be a great idea. In industry there are "shared memory cards" that are very expensive that people use to dump data between simulations like that. You could do something similar of course

Al Williams12:46 PM
Ohhh virtual miniNEC ... I like that

Johnny joined  the room.12:46 PM

salec12:46 PM
Something like a stream of time-enumerated event codes

Al Williams12:47 PM
Look up "reflective memory" - but very pricey

Ethan Waldo12:47 PM
I'd just be happy if any of these tools were written using modern software testing development practices so all the tribal knowledge of the people who wrote them aren't hidden or lost.

Dan Maloney12:48 PM
Meh, it's still VR -- people would end up barfing on their simulations

Al Williams12:48 PM
People barf on mine anyway

Bil Herd12:48 PM
I simulate my barf

Ethan Waldo12:49 PM
That's why it's so hard to replace specific EDA tools because no-one knows all the intricate details.

Al Williams12:49 PM
Not digital per se, but we did some video on LT Spice a while back: https://hackaday.com/2016/02/26/adding-spice-to-your-workbench/

salec12:49 PM
Vendor lock-in is business strategy

Al Williams12:49 PM
That's part of the reason, true. Vendor lock in is pretty strong too

Al Williams12:49 PM
lol yep

Ethan Waldo12:49 PM
even the open ones are very esoteric

Al Williams12:50 PM
One of the things we do with the BootCamp is use the open source ICE tools and they are not half bad.

Al Williams12:50 PM
But post synth simulation and all was lacking last time I dug into them

Al Williams12:51 PM
It seems like tools are like standards... everyone loves to make their own

charliex12:51 PM
NIH is a cancer

Ethan Waldo12:51 PM
And too often the WHY of doing something gets lost.

Darrin B left  the room.12:52 PM

Ethan Waldo12:52 PM
Like, why did you pick that constant? How did you derive it? Why is it applied in this particular way?

Al Williams12:53 PM
As an engineer I do suffer from that but as a business guy I try to remember that I should be open. I had a startup company reach out to me once and they had some process with a patent. But the first thing they wanted to do was build a control system for the process because all the ones from Honeywell, Applied Automation, Foxboro, etc couldn't possibly do their process. It was far too special. Needless to say, that blew up in 6 months.

charliex12:53 PM
one of stages has a constant in it that someone we figured had derived it properly like 10 years ago, turns out after asking they'd guessed a value

Al Williams12:53 PM
I had advised them to focus on their core competencies but... oh well

Ethan Waldo12:54 PM
@charliex yes, many end up being approximations based on assumed common use but break down if you're doing something else.

Al Williams12:54 PM
@charliex (Mr. Evans?) -- that's funny. I have a habit of making up schedules and putting notes on them that says "This schedule is made up. It is totally wrong. Someone needs to put in a real schedule here" and then I still see the schedule at the end

charliex12:55 PM
yeah its just using good engineering practices, had they commented it was a guess , we'd have calculated it and improved on it no end. its just interesting for NIH and the often said that first day of a new engineering job is throw out the previous folks work,, fun times

Ethan Waldo12:55 PM
So Al, what kinds of logic-based projects do you find yourself working on these days?

Nicolas Tremblay left  the room.12:56 PM

charliex12:56 PM
@Al Williams for sure .. some of our engineers refuse to give time schedules because they say its impossible to give accurate ones... the struggle between shipping and r&d :)

salec12:56 PM
Al, are simulators (and design languages) dealing with, say propagation of errors (like, logic state: "unknown", or "any", or "worst case not what you wanted")?

Al Williams12:56 PM
Hmmm... well in previous day job we did a lot of state machines to handle the docking system that is on the space station (NDSB1). Rad hard FPGAs. Lots of failure analsysis

Al Williams12:57 PM
@salec It depends. Simple ones, no. But Verilog, for example, has lots of wire states: 0, 1, X, Z with very specific rules about how X and Z mix with other things

Al Williams12:58 PM
There are also drive strengths you can associate

salec12:58 PM
So, you can invent your own algebra, basically?

Al Williams12:58 PM
So a strong 1 can overcome a weak 0 or whatever

charliex12:58 PM
i had to leave mid chat and tend to the cnc warming up cycle. but did anyone ever actually realise that asic/fpga combo chip i forget if it was altera/xilinx that was talking about it

Al Williams12:58 PM
Well I wouldn't put it that way because they do have very specific rules. But by manipulation I guess you can see it that way.

Al Williams1:00 PM
You hear about it all the time, but.... I suspect it would be like Microsemi... they claim you can develop on cheap hardware and move to RTAX but the reality is it isn't much different than developing on Xilinx and going to RTAX. The arch is different enough that it doesn't matter much

monsonite1:00 PM
I have been using Digital recently to simulate bit-serial arithmetic as used in the PDP-8/S the CDP1802 amnd early Japanese desktop calculators. It's amazing what can be done with a few gates and some shift registers.

Dan Maloney1:00 PM
Coming up to the top of the hour, so we'll have to let Al get back to work. I just want to say thanks to Al for stopping by today, I really appreciate it. And thanks to everyone for hanging out and asking questions, too.

charliex1:00 PM
thanks al

Ethan Waldo1:01 PM
yes, thanks for taking the time

Bil Herd1:01 PM
Thanks!

salec1:01 PM
Thanks Al

monsonite1:01 PM
thanks Al

Al Williams1:01 PM
Yeah I love serial ALUs... the oldl Cambridge machines did that. Math at the end of a mercury delay tube

Al Williams1:01 PM
Thank you everyone.

Dusan Petrovic1:01 PM
Thanks Al and everyone who participated

Al Williams1:02 PM
See you on Hackaday!

Dan Maloney1:02 PM
Next week we'll be changing things up a bit:

Dan Maloney1:02 PM

https://hackaday.io/event/184160-metal-3d-printing-hack-chat

HACKADAY

Metal 3D Printing Hack Chat

Printing isn't just for plastic Wednesday, March 9, 2022 12:00 pm PST Local time zone: Hack Chat This event was created on 02/24/2022 and last updated 5 days ago. Join this event's team Agustin Cruz will host the Hack Chat on Wednesday, March 9 at noon Pacific. Time zones got you down?

Read this on Hackaday

Dan Maloney1:02 PM
Thanks all. Transcript coming up shortly.

Al Williams1:03 PM
Oh I want a metal 3D printer!!!

charliex1:03 PM
movem.l (sp)+,d4-d7 \n unlk a6 \n rts ; back to work

charliex1:03 PM
ooh sintereing

morgan1:04 PM
cool, that will also be an interesting one

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