This is launch control: T-10 minutes and counting! All chat participans are "GO!" for chat with Chip Gracey! :)))
Carol Lynn Hazlett Am I here yet?
@Carol Lynn Hazlett !
Hi @Jordan Bunker !
Joshua Reisenauer Hi.
Jordan Bunker Howdy @Sophi Kravitz!
Jon Thomasson hi to all the propeller head
Anyone with questions or something they want to discuss can use this sheet: https://docs.google.com/spreadsheets/d/1sNe1sCibQJp4Ad609V-trtYD6eaN3VVPV4V4hnFsGc0/edit#gid=0
Chip Gracey I'm ready.Antti Lukats, hello.
Carol Lynn Hazlett Hi Ken!
Ken Gracey Wow, lots of familiar faces here.
hey @Ken Gracey
Seairth Jacob @Ken Gracey because we can't get enough of the propeller!
@Chip Gracey from Parallax is joining us today
Chip Gracey Hello, Everyone.
@Chip Gracey can you tell us a little bit about yourself and what you're working on? Well...I've been into electronics since I was about 10. Self taught. Started Parallax right after high school with a friend from junior high. Parallax slowly grew to look like a company.
Chip Gracey What else? Ah, working on a new chip called the Propeller II. It has sixteen 32-bit cores and has been much designed by the community on the Parallax forums.
Chip Gracey I've been busy in Verilog for most of the last 17 years.
Carol Lynn Hazlett @Chip Gracey Will the new chip br compatible with Blocklyprop?
Chip Gracey Anyone can ask me anything, if there's something they're interested in.
Chip Gracey Yes, we will make a BlocklyProp front end for it.
Jon McPhalen Can the P2 do set-and-forget fixed-frequency, variable duty-cycle PWM? I use counter updates in a loop now -- would love to dump the loop.
Chip Gracey @Jon, yes. Each pin has a brain of its own.
Jon McPhalen I've been so busy coding the P1 that I haven't kept up with the P2. Can go into more detail about the "smart" IO pins?
Chip Gracey By starting up the smart pins on the same cycle, any number of them can be synchronized.
Chip Gracey Ok...
Please tell more about "pin brains".
Chip Gracey says:3:10 PM
Let me get something I can paste here...
// %MMMMM: 00000 = smart pin off (default)
// 00001 = long repository (P[12:10] != %101)
// 00010 = long repository (P[12:10] != %101)
// 00011 = long repository (P[12:10] != %101)
// 00001 = DAC noise (P[12:10] = %101)
// 00010 = DAC 16-bit dither, noise (P[12:10] = %101)
// 00011 = DAC 16-bit dither, PWM (P[12:10] = %101)
// 00100* = pulse/cycle output
// 00101* = transition output
// 00110* = NCO frequency
// 00111* = NCO duty
// 01000* = PWM triangle
// 01001* = PWM sawtooth
// 01010* = PWM switch-mode power supply, V and I feedback
// 01011 = periodic/continuous, A-B quadrature encoder
// 01100 = periodic/continuous, inc on A-high
// 01101 = periodic/continuous, inc on A-rise
// 01110 = periodic/continuous, inc on A-high, dec on B-high
// 01111 = periodic/continuous, inc on A-rise, dec on B-rise
// 10000 = time A states
// 10001 = time A highs
// 10010 = time X A-highs
// 10011 = for X periods, count time
// 10100 = for X periods, count states
// 10101 = for periods in X+ clocks, count time
// 10110 = for periods in X+ clocks, count states
// 10111 = for periods in X+ clocks, count periods
// 11000* = USB host, low-speed (even/odd pin pair = DM/DP)
// 11001* = USB host, high-speed (even/odd pin pair = DM/DP)
// 11010* = USB device, low-speed (even/odd pin pair = DM/DP)
// 11011* = USB device, high-speed (even/odd pin pair = DM/DP)
// 11100* = sync serial transmit (A-data, B-clock)
// 11101 = sync serial receive (A-data, B-clock)
// 11110* = async serial transmit (baudrate)
// 11111 = async serial receive (baudrate)
Shantam Raj You said u have busy with Verilog for 17 years..... i myself wanted to get started with FPGAs and verilog, what do u think is the best way to do that, any good resources out there. I have a background in electronics so i am not really looking for...
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