Designing a Microcontroller with Eight 32-bit Cores: Propeller II

Chip Gracey is legend in the microcontroller world. Chip started Parallax right out of high school, and has been working for decades to create hardware that’s fun, powerful, well documented, and open to the community. If you’ve ever worked with the Basic Stamp or Propeller, you’ve used Chip’s hardware before. Chip joined us as host of a Hackaday.io Hack Chat to talk shop and answer questions about the impending release of the Propeller II.

I personally remember spending hours playing with the Propeller Board of Education, so I was especially excited to hear all the juicy details about the next version. At the same time, I learned a lot more about Chip himself, and the journey he’s taken through his career.

Chip: Well...I've been into electronics since I was about 10. Self taught. Started Parallax right after high school with a friend from junior high. Parallax slowly grew to look like a company.

What else? Ah, working on a new chip called the Propeller II. It has sixteen 32-bit cores and has been much designed by the community on the Parallax forums.

I've been busy in Verilog for most of the last 17 years.

Everything has been a lot of fun. It was fun to get the Prop1 done, as it was a full-custom chip. I designed my own RAMs, ROMs, PLL's, logic, I/O pads, etc. That was a big project. It took 8 years. The Prop2 has been going on for 11 now, and I think it's done.

The Propeller is a unique chip in the microcontroller realm. It’s a multi-core device meaning it's really multiple microcontrollers in one package all able to work together and share peripherals. There is a devoted following of developers who use the chips and that community is excited for the sequel, dubbed Propeller II.

Given that the project was started eleven years ago, a lot of people might suspect that the Propeller II would be obsolete the moment it's etched in silicon; not so. In a way, the Propeller II sidesteps the whole ARM microcontroller competition, and instead offers a different way to do things. It also aims to address some of the frustrations with reliability many other microcontrollers suffer.

Chip: People always ask me if the Prop2 will be obsolete when it's done, since it's been so long in the making.

My answer is that it is something new that lets you work in a different way. Most of the microcontroller world has gone the ARM direction, it seems.

ARM is all about running compiled C code and having tight real-time processes handled by silicon peripherals. To get it to do something a few degrees off from its intended use may be about impossible.

It's nice when things work consistently, too. Today, there is a plague of flakiness that affects almost everything. The Propeller idea is to seek safe haven.

The purist will appreciate the idea of a powerful microcontroller that operates on robust assembly code, keeping the programming close to the silicon. It’s rare to find a company that’s willing to embrace the idea of finding new ways to make assembly programming fun and approachable. A lot of this is driven by Chip himself who is a veteran assembly programmer. For those less inclined to delve into assembly, the Propeller II can also be programmed using the Spin programming language or Propeller C. But for Chip it’s not dogma but practicality to each different firmware developer that matters.

Chip: The Prop2 is very flexible, like an FPGA, with maybe macros to handle common things like math operations. You are able to program it to have Nth-cycle repeatability.

I've been programming in assembly for what seems like forever. So, I have always wished for this and that. Now, I get to implement all those ideas.

Programming in assembly can be fun and really liberating. I've tried to make our assembly language like a playground. Modern architectures tend to be hideous, as the only consideration for their assembly language is C-compiler targeting.

Programming SHOULD be fun. It's a venue for learning analogs to everything in the physical world.

The Propeller is like a solution floating around, ready to address problems. It's not targeted at any specific market, but at PEOPLE.

What Can the Propeller II Do?

Of course by now you’re probably interested in what exactly the Prop2 is capable of, and Chip didn’t hesitate to share. While full tech specs are shared at the link Chip posted below, much of the conversation centered around the traits found in the IO pins. There are 64 “smart pins” which offer incredible synchronization when timing matters, and also include analog properties that you’re probably not used to seeing in microcontroller datasheets.

Chip: Here is the top of the Prop2 forum thread where I keep links to the current doc's: http://forums.parallax.com/discussion/162298/prop2-fpga-files-updated-10-april-2017-version-18a/p1

There are 64 pins and they are all smart. They are also analog. They have 150-ohm and 1k-ohm 8-bit DACs and sigma-delta ADCs, plus an 8-bit level comparator. Each pin has a brain of its own. By starting up the smart pins on the same cycle, any number of them can be synchronized.

They can all run concurrently. Each has separate hardware.

Let me get something I can paste here...
// %MMMMM: 00000 = smart pin off (default)
// 00001 = long repository (P[12:10] != %101)
// 00010 = long repository (P[12:10] != %101)
// 00011 = long repository (P[12:10] != %101)
// 00001 = DAC noise (P[12:10] = %101)
// 00010 = DAC 16-bit dither, noise (P[12:10] = %101)
// 00011 = DAC 16-bit dither, PWM (P[12:10] = %101)
// 00100* = pulse/cycle output
// 00101* = transition output
// 00110* = NCO frequency
// 00111* = NCO duty
// 01000* = PWM triangle
// 01001* = PWM sawtooth
// 01010* = PWM switch-mode power supply, V and I feedback
// 01011 = periodic/continuous, A-B quadrature encoder
// 01100 = periodic/continuous, inc on A-high
// 01101 = periodic/continuous, inc on A-rise
// 01110 = periodic/continuous, inc on A-high, dec on B-high
// 01111 = periodic/continuous, inc on A-rise, dec on B-rise
// 10000 = time A states
// 10001 = time A highs
// 10010 = time X A-highs
// 10011 = for X periods, count time
// 10100 = for X periods, count states
// 10101 = for periods in X+ clocks, count time
// 10110 = for periods in X+ clocks, count states
// 10111 = for periods in X+ clocks, count periods
// 11000* = USB host, low-speed (even/odd pin pair = DM/DP)
// 11001* = USB host, high-speed (even/odd pin pair = DM/DP)
// 11010* = USB device, low-speed (even/odd pin pair = DM/DP)
// 11011* = USB device, high-speed (even/odd pin pair = DM/DP)
// 11100* = sync serial transmit (A-data, B-clock)
// 11101 = sync serial receive (A-data, B-clock)
// 11110* = async serial transmit (baudrate)
// 11111 = async serial receive (baudrate)


The Prop2 will also be faster and have more RAM than the Prop1 (and will also be capable of many other things which are technically over-my-head). Chip jumped right into the gritty details of explaining bytecode execution features, and the spoke system for reading and writing to RAM.

Chip: The Prop2 will have 512KB of hub RAM and each processor has 4KB of dual-port RAM. Compare that to the Prop1's 32KB/2KB.

I just added a feature to the Prop2 that, in six clocks, can fetch a byte from hub memory, look it up in the local LUT RAM, and jump to code within the cog (processor) memory with a SKIP pattern, where it jumps over unwanted instructions. It means efficient bytecode execution for custom bytecode engines.

I also added instructions the other day for fetching, in two clocks, 1..4 bytes from hub RAM, based on the MSBs of the upcoming bytes. So, it's a data-driven word fetcher.

The bytecode engine is for custom bytecode schemes. You write code that runs in the cog which handles the bytecodes.

We have a spoke system, where the main RAMs rotate against the 16 processors. Each of the 16 RAMs is responsible for a particular LONG. To read LONGs in sequence, you wait for the starting RAM to come by, and then start reading. You can read/write one long on each clock. Every processor can do that, concurrently!

The Cost of Fabbing Silicon

In keeping up with modern microcontrollers, some hack chat attendees wondered if the Prop2 would come with low power options. The power dissipation of a chip is really a limitation of how small you can fab the features on silicon. While the cost of smaller processes has decreased significantly in modern years, it’s still prohibitively expensive for smaller companies. It is refreshing to have a frank conversation of fab costs. It’s a topic that affects all of our access to small-run components but rarely do we get to jump into the nuts and bolts of how this applies to to chip design firms themselves.

Chip: I'm estimating that the Prop2 will dissipate up to 2W with everything running. That's a limitation of the fab process, 180nm, which is 19 years old, but Parallax can afford to use. It costs about $250k to get to production if your Verilog is done.

They are estimating that to make a reasonably-complex chip in 5nm is going to require a $500M investment. There are only a few companies in the world that can afford that. Samsung, Apple, ???

It's too bad that smaller processes are SO expensive. Even 28nm is maybe $3M today. Transistors are cheaper than ever, but to get there is more expensive than ever. It used to cost us $600k for the masks. Today it's about $130k.

It's stressful to design for an event, in which the chip works or it doesn't, but hopefully works enough to be able to fix what's wrong.

So, with that in mind, where does that put the price point, and is it competitive with other modern microcontrollers on the market?

Chip: I think we will probably sell the Prop2 at 1k pieces for around $6..$8, maybe less. Not sure, yet.

We are fabless and quite truthfully low-volume in comparison to the big boys, which makes the per-unit cost higher than you'd expect.

The Prop2 die is huge. It's 8.5mm x 8.5mm, which is a lot of silicon. That's needed for easy programming, though, where you can keep adding without breaking what's already working.

Pushing a little further, some of the folks on the chat were (understandably) eager to find out just how much a single Prop2 chip would cost them. Chip threw out a number, but it’s also worth noting that the Prop2 isn’t necessarily optimized for cost; it’s designed to be exactly what the community wants it to be. It’s also possible that other companies will make Prop2 boards, so the price will likely vary by distributor.

Chip: $10, I suppose. If it's worthy, you will develop a long-term relationship with it. Your time spent on it will be valued in the $10k's..$100k's.

We'll have various boards, for sure.

Ken Gracey: We will make whatever you will buy. It could be that we offer a few simple modules from Parallax ('specially for BlocklyProp and education), plus whatever Chip needs for development. Ideally, P2 will take flight and others will make the boards too.

Jump Into Hardware Design Language

It’s clear that a monumental amount of work on Prop2 has come not only from Chip Gracey, but from the community as well. As an open hardware design, the community has played a significant role in defining what the Propeller 2 has become. Some of you might be eager to know how you can get started in arcane art of Verilog and FPGAs, and as Chip says, the best approach is to just jump right into the cheap end! Buy a cheap board, and get started with a project you have in mind. It might be painful at first, but who knows, you may learn to love it.

Chip: I would get any sub-$50 board and start to learn with it. Hardware description is the ultimate frontier in digital design. Anything you can dream up, you can implement.

I'm partial to the Altera (now Intel) stuff. Get yourself some cheap FPGA board and jump in. Verilog is terse, like C. I didn't like it, at first, but I love it nowadays.

written by: Jordan Bunker

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Parallax joins us in the Hack Chat

Friday, May 5th at noon PDT, @Chip Gracey from Parallax is joining us in the Hack Chat.

For the last 11 years, Chip has been working on the Propeller II.

Chip is helped by a motley group of forum participants who've been programming the new Propeller chip. The Propeller concept is 8 or 16 separate cores, connected via a shared central memory and I/O pins.

This makes for very fun programming, as the architecture is intended to be understood at the assembly-language level, making disparate real-time feats very achievable.

About Chip Gracey:

Chip grew up in northern California during the 1970's and 80's when computers were becoming accessible. Interested in electronics since childhood, he began programming an Apple ][ and built cross-platform development systems for the C64 while a freshman in high school.

Between graduating high school and bombing out of his local junior college with a 0.95 GPA, he and a friend started Parallax in 1987.

The company initially flirted with different product ideas, but found its niche in microcontrollers and development tools. Everything Parallax makes today is intended for invention and/or education.

Bring your questions and projects about anything to do with Parallax design to this week's Hack Chat!

We're meeting in the #Hack Chat on May 5th, noon PDT.

Here's the list for discussion and questions, add yours to the sheet!