Close

High Speed Data Acquisition Chat Transcript

A event log for High Speed Data Acquisition Chat

We'll be talking about how capture and use your data (yes, on a budget) using the BeagleBone platform

Dusan PetrovicDusan Petrovic 11/17/2017 at 18:320 Comments

Sophi Kravitz : Hi everyone!

Sophi Kravitz : We're trying something different for discussion in today's Hack Chat. Please add your questions/ comments to: https://hackaday.io/event/28018-high-speed-data-acquisition-chat

Sophi Kravitz : morning everyone!

morgan : helloooo

Shulie Tornel : Morning

Sophi Kravitz : hi @Shulie Tornel !

Sophi Kravitz : @Lutetium are you here too?

Miha has joined this room.

Sophi Kravitz : @Tortingo what platform are you interested in working on?

kristina panos : Morning!

Kumar, Abhishek : Morning everyone! Checking in.

draufunddran says :Good afternoon.

Lutetium : Hello everybody!

Sophi Kravitz : welcome @Kumar, Abhishek !

Sophi Kravitz : we'll get started a few minutes after the hour for those on IST, and a few minutes after the half hour for those in PST, CST, EST...

Sophi Kravitz : any other time zones checking in?

MagicWolfi : AST.  :)

Sophi Kravitz : where is that?

matt venn : yo, here from  (european central time) ECT?

Radomir Dopieralski : WET here

Christoph : 6:30 PM UGT

Sophi Kravitz : hahaha, let's start in 5 minutes

MagicWolfi : @Sophi Kravitz  Atlantic Standard Time. Halifax Nova Scotia.

Sophi Kravitz : I visited Nova Scotia recently!

Sophi Kravitz : for Halifax Pop festival

Sophi Kravitz : Let's get started!

Sophi Kravitz : @Kumar, Abhishek please introduce yourself!

Kumar, Abhishek : Hi everyone, I am Abhishek.

Carlo Maragno has joined this room.

halabaloosa has joined this room.

Kumar, Abhishek : My journey into the world of electronics began when I was 7 years old, learnt to program microcontrollers at 12.

Kumar, Abhishek : Since there, it's been a great ride through 8051s, AVRs, STM32s and ... the BeagleBoard.

Kumar, Abhishek : I recently finished my Masters in engineering from the Indian Institute of Technology Kharagpur.

Sophi Kravitz : congrats!

Soul_Est : Congratulations @Kumar, Abhishek !

Kumar, Abhishek : Thanks! When I was in my second year, through the Summer of Code with

BeagleBoard.org, BeagleLogic was born.

matt venn : is it any relation to prudaq?

Kumar, Abhishek : yes, I'll come to that in a bit.

Sophi Kravitz : tell us a little about Summer of Code

Kumar, Abhishek : So, Google Summer of Code (summerofcode.withgoogle.com) is a program run by Google.

Kumar, Abhishek : They sponsor students to work on open source software projects across around 200 open source organizations every year and they have been doing this for over 10 years now.

Radomir Dopieralski : You can volunteer to mentor in it  if you are not a student too!

Michael Welling : indeed

Kumar, Abhishek : I've been a mentor for the past 3 years now.

Kumar, Abhishek : After I was a student. I also got to attend the GSoC mentor summit in 2015

Kumar, Abhishek : When I also met the Hackaday folks there in SFO, this was just before the first Supercon.

Kumar, Abhishek : In the GSoC Program, you work on a project for 12 weeks. You have to apply first, write a proposal stating what you're gonna do in the next 12 weeks...

Sophi Kravitz : how long is the proposal?

Kumar, Abhishek : and if your project gets selected, you work on it and are assigned mentors from the organization who are available to you for any doubts or resolve any issues that you might encounter in the process.

Kumar, Abhishek : I think I have the proposal I wrote for BeagleLogic. Let me check

Kumar, Abhishek : It was 2-3 pages if I remember correctly

Sophi Kravitz : Just because I am curious :) did they give you an outline or was it totally freeform?

Kumar, Abhishek : There were a few questions I had to fill up, for example, how beneficial it will be to the community (we had to collect feedback from potential mentors and BeagleBoard.org community members)

Kumar, Abhishek : What will you do if your mentors are busy and are unable to help you, and you are blocked?

Sophi Kravitz : what was your answer?

Sophi Kravitz : on that one?

Kumar, Abhishek : I would look at documentation on my own, and try to figure it out.

Soul_Est  : ^ Best way to go about it.

Kumar, Abhishek : Or I would look at other tasks that I need to do, and carry on

Kumar, Abhishek : It may be that there is something else I can accomplish within the time my mentor isn't available.

Jarrett : how are mentors paired up with students?

Soul_Est : And did you have such things happen? Like dealing with the PRU input or outputting the data stream?

Jarrett : how do you know the mentors have the correct skillset?

Kumar, Abhishek : In my case, I was asked to find a mentor from among the community members.

Kumar, Abhishek : For example this page - https://elinux.org/BeagleBoard/GSoC/Ideas-2014

Sophi Kravitz : Alright...let's talk DAQ. First question is from @Soul_Est : Would it also be possible to use the GPU to also process the data acquired from the PRUs? While not as fast as the Cortex-A8, it is a multi-core unit which should allow for the data to be operated on in parallel.

Sophi Kravitz : (we can return to Summer of Code after all the questions are done)

Kumar, Abhishek : Interesting question. I haven't played with the GPU on the BeagleBone yet, but the PowerVR SGX530 GPU on the AM335x SoC requires a number of binary blobs to function, and those blobs are not available readily for all kernel versions.

Kumar, Abhishek : As far as I know. However if the blobs are available for kernel version 4.9 (which BeagleLogic currently runs on) then I would probably look at getting the PowerVR SDK and seeing what can be done with it.

Michael Welling : may be possible but certainly not easy

Kumar, Abhishek : This wiki page might be a starting point for SGX programming and SGX support - http://processors.wiki.ti.com/index.php/Processor_Linux_SDK_Graphics_and_Display?keyMatch=PowerVR&tisearch=Search-EN

Soul_Est : I though so. I much reading to do aside from your code.

Soul_Est : I unfortunately have to head back to work. Enjoy the chat everyone!

Sophi Kravitz : bye @Soul_Est !

Sophi Kravitz : second question is from @Nick : Can you talk a little bit about the DMA interface between the PRUs and the CPU?

Sophi Kravitz : question from Sophi: what is the DMA interface?

Sophi Kravitz : ;)

Kumar, Abhishek : DMA stands for "Direct Memory Access". It's basically a way of transferring contents from memory<->peripheral without intervention from the CPU.

Michael Welling : https://en.wikipedia.org/wiki/Direct_memory_access

Kumar, Abhishek : There's usually specialized hardware for that, called a DMA controller that is a part of the SoC

Kumar, Abhishek : You tell it the start and end addresses, source and destination and it moves bytes from one place to another.

Kumar, Abhishek : In my case the PRUs are used as "sort of" or a pseudo-DMA controller

Kumar, Abhishek : Ok, this infographic:

Kumar, Abhishek :

Kumar, Abhishek : ( I made this just before the hack chat started :) )

Kumar, Abhishek : There is a circular buffer in the DDR RAM (512MB) that is managed by the BeagleLogic kernel driver.

Kumar, Abhishek : The buffer is split into chunks of 4MB each, and you can have up to 75-80 such chunks before you run out of memory on the BeagleBone

Kumar, Abhishek : (you want to run your userspace applications as well, so need some memory for that as well)

Kumar, Abhishek : The Physical Address of the memory buffers is given to the PRUs to write into.

Kumar, Abhishek : And at the "start" command, it takes data and writes it into the RAM without intervention from the CPU. After it has written a 4MB chunk, the PRUs signal the ARM core through an interrupt.

Kumar, Abhishek : The kernel receives it, and makes the buffer available for reading.

Kumar, Abhishek : For how the two PRUs co-ordinate, there is a blog article I'll point to -

Kumar, Abhishek : http://theembeddedkitchen.net/beaglelogic-building-a-logic-analyzer-with-the-prus-part-1/449

Keith has joined this room.

Kumar, Abhishek : The special thing here is that the PRUs have their own high-speed GPI/GPO interface, PRU1 handles the sampling

Kumar, Abhishek : PRU0 handles writing those samples to the memory.

Kumar, Abhishek : once those samples are in memory, it's just a matter of reading it out from a device file "/dev/beaglelogic" .

matt venn : I had problems getting all the data stored

matt venn : I found the beaglebone couldn't write the data to a usb stick fast enough and the buffer would overflow

Kumar, Abhishek : Yeah, that's the sad part at 100MSa/s.

matt venn : with a logic analyser, we can throw away a lot of data as we're only interested in the changes

matt venn : but if I wanted to use it for sampling analog data, how could I store it fast enough?

Kumar, Abhishek : You could probably stream out data using Ethernet, but that tops out at 100Mbps.

matt venn : Yes I managed that when I was testing, but I was hoping that the bbb would be able to work standalone

Kumar, Abhishek : The BeagleLogic Standalone device that I designed has Gigabit Ethernet, yet it struggles to stream data through the Gigabit interface at 20MB/s.

matt venn : ;(

Michael Welling : sample compression maybe?

matt venn : I'm working on something that needs 40mb/s and although I actually only need to store samples after a trigger event, I'd love to know how to keep the data for testing/debugging

Kumar, Abhishek : For that there should be enough CPU time available as well. For logic analysis one could probably use RLE on the PRU firmware but I haven't implemented it so far.

Kumar, Abhishek : (for sample compression)

Kumar, Abhishek : For why there's enough CPU time, there's also another issue here - Cache coherency.

Kumar, Abhishek : *there's not enough CPU time

Kumar, Abhishek : So the PRUs are writing to the memory and the CPU is not aware of this remember.

Kumar, Abhishek : Access to the memory happens through a cache on the CPU side, so that it is fast enough.

Kumar, Abhishek : Thus when the PRUs signal the CPU that there's data available...

Kumar, Abhishek : It has to flush and rebuild the cache, and that takes a LOT of CPU time.

Kumar, Abhishek : So at 100MSa/s and 16bits (2 bytes per sample), there isn't enough time left after the cache is flushed and another buffer arrives.

Kumar, Abhishek : A variant of the BeagleBone that has 1 GB of RAM will give a lot more headroom for storing samples and analyzing data.

Kumar, Abhishek : I think I have already answered the question... and a lot more.

Michael Welling : have you tried beaglelogic on the x15?

Sophi Kravitz : Good timing because we're out of time in 5 minutes, although everyone is welcome to stay.

Kumar, Abhishek : Yes, the kernel driver works on the X15 and is able to sample data.

Kumar, Abhishek : However I haven't connected the logic inputs to something and tried capturing real world logic data here, it should work once there's an add-on hardware for it.

Kumar, Abhishek : The BeagleBoard-X15 should be much more comfortable processing data and even streaming it out through the Gigabit interface that is available.

Kumar, Abhishek : There's also USB3.0 on it, so you can connect an SSD and store data on it. I've found speeds up to 200MB/s with a USB SSD.

Sophi Kravitz : This was posted in the comments by @Neris : Wanted to share arduino logic, UNO running @200kHz, Due can do much more given the time/dma. sigrok does not explain the encoding, here is the hint https://hackaday.io/project/26356-ginlogic-arduino-due-uno-ginlab (no likes yet :)

In the plans to utilise 16 pata/atapi lanes on desktops, any help would be appreciated, maybe Linux kernel driver someday, join me, thanks

matt venn : Did anyone have an idea of how to store data at 40mb/s ?

Radomir Dopieralski : display it an let the user memorize it ;)

matt venn : is the beaglebone not up to it

matt venn : lolz

matt venn : as long it's all zeros no problem

Michael Welling : 40 MBytes or 40 Mbits?

Jarrett : and for how many seconds?

matt venn : bytes

matt venn : as long as the storage lasts

matt venn : I bought a 64GB usb stick

matt venn : before I realised it was never going to be fast enought ;)

Jarrett : DDR of some kind is probably your only choice, I guess

Kumar, Abhishek : G'night people! I'm leaving for the day. See you!

matt venn : thanks Kumar

Jarrett : get an FPGA dev board that takes DDR RAM and use that as your logic analyser

Jarrett : thanks, Abhishek!

Jarrett : good talk!

Jarrett : and the stuff you're doing is rad

Michael Welling : I might try a logic analyser on the beaglewire

Michael Welling : it only has sdram not ddr though

Michael Welling : https://blackmesalabs.wordpress.com/2016/10/24/sump2-96-msps-logic-analyzer-for-22/

Michael Welling : beaglewire was spawned by another gsoc project that I was the mentor for

Michael Welling : https://www.crowdsupply.com/qwerty-embedded-design/beaglewire

Discussions