What do you think of this weird ALU Design?
Paul Schmitz wrote 10/08/2017 at 14:40 • 0 pointshttp://www.6502.org/users/dieter/a4/a4_7.htm
What are advantages/disadavantages of this weird design?
Is this the way to get the most functionality per logic gate out of an 1 bit slice CPU? And are there limitations with this design if I want to use it for a 16-bit ALU?
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AND/OR/XOR seem to be the "standard" ALU for one bit CPUs (i.e. MC14500B).
You can construct in software the remaining function but the cost is speed.
In many respects you need to consider if you are going to use the ALU function frequently or not.
For one bit CPUs they are usually used (in the distant past) for PLC applications (i.e. reading sensors and controlling motors/heaters/whatever (e.g. think of traffic lights)). So AND/OR/XOR would be very useful but SHR/SHL would very rarely used.
Another extreme is the Subleq CPU, it only has a SUB and jump on LEQ instruction.
My TTA CPU only has ADD and NAND! For my TTA a native ADD takes 3 machine cycles while a constructed XOR takes 9 cycles. SHR right is a loop of ADDs and takes lots of cycles!
AlanX
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This might be what he used in the MT15, as he was handsoldering all transistors in his 16-bit computer and it paid to reduce the number of transistors.
I studied it for my TTL microcomputer but being tied to standard packages I couldn't follow all of his optimisations. I now don't have his right-shift for example.
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