put 2 fpga and make DOS/commodore/Amiga emulator like a gameboy , clockworkpi , Dingoo etc.

Hello,

Those boards are all similar and pretty good choices to get started playing around with FPGAs, I think.  Another board you might consider is Upduino 2.x (https://www.tindie.com/products/tinyvision_ai/upduino-v21-low-cost-fpga-board ).  It uses the same FPGA as IceBreaker, but similar breadboard form factor to TinyFPGA BX (but includes USB JTAG/UART HW).

All of these FPGAs are "open source hardware" and can be programmed using the fast and friendly open source Yosys/Nextpnr FPGA tool chain (and also Lattice vendor tools - however TinyFPGA has no vendor compatible JTAG).

I have worked a fair bit with all of these boards (along with most other hobbyist FPGA boards).  Other than form factor differences, here is a small comparison:

== TinyFPGA BX (~$40)
Lattice ICE40LP8K with 7680 logic cells, 128Kb (16KB) BRAM, 2 PLLs, 16 MHz MEMs oscillator.
No USB/JTAG hardware, but uses a separate FPGA "USB bootloader" partition in flash to support USB bitstream upload.  It also has no USB UART harware (and implementing a USB CDC in your design is complex and can use a fair bit of resources).   While this is FPGA USB design is "very cool", I find it is not quite as convenient to use as hardware USB/JTAG (it can have issues on certain PCs or VMs and can also delay FPGA design startup a few seconds).
For FPGA design storage it has 8MB SPI Flash (which holds bootloader, user design and user "free space").

== Icebreaker FPGA (~$65)
Lattice ICE40UP5K with 5280 logic cells, 120Kb (15KB) BRAM and 1Mb (128KB) SPRAM (especially handy for smallish SoC designs), 8 16x16 multiplier blocks, 1 PLL, 12 MHz oscillator.
Full FTDI 2232H HW so you get a JTAG connection and a UART at the same time (very nice - no switching between JTAG and UART "modes" - so you can leave terminal window open during development).
For FPGA design storage, it has 16 MB flash (QSPI-DDR, so faster and with more space for user).

== Upduino V2.x (~$20)
Lattice ICE40UP5K with 5280 logic cells, 120Kb (15KB) BRAM and 1Mb (128KB) SPRAM (especially handy for smallish SoC designs), 8 16x16 multiplier blocks. 1 PLL, 12 MHz oscillator (on external pin, so needs an external wire to hook to FPGA clock input)
FTDI 232H HW, for JTAG or UART (one at a time).  Mostly it defaults to JTAG only, but (under Linux), you can switch driver to use USB CDC serial (so possible to use as UART in your design also, but requires switching driver "modes" between programming [under Linux at least, not sure about other OSes]).
For FPGA design storage it has 8MB SPI Flash (user design and user "free space").

None of these FPGAs is particularly "fast" as FPGAs go (designed for low power), but I think ULP is a bit slower than LP (but you get extra SPRAM and multiplier blocks).  Figure around 50Mhz or so for top "maximum frequency" (FMAX) in my experience (but of course varies greatly with design).

Let me know if you have any other questions about these or other FPGA boards.

@Xark that's a fantastic run down. Thank you so much for taking the time to write it.

I hadn't heard of the upduino that you and @ajlitt have mentioned. They look like a decent piece of hardware but they seem to be slightly behind say Tiny FPGA on the examples and community support side.

The tips on programming interfaces are great - I would never have thought to think about this. 

I have two main questions at this stage. The first one is about simulation. Is learning a simulator a helpful route into learning FPGAs? I heard that simulation is the right way to debug FPGAs before loading the bitstream. Could it serve as a useful learning tool for, say, someone who hasn't yet decided what aspects and applications of FPGAs are most interesting to them? 

Secondly, please could you let me know what ulp means for FPGAs? I'm used to low clock speeds and sleep modes reducing average currents to uA ranges on microcontrollers. What applications are an especially good fit for ulp FPGAs and what kinds of performance are available? 

My pleasure, I'm glad you found it helpful.

I find there are quite a few examples and resources for all of these boards (forums, GitHub, project sites, blogs etc.).  However, if you see a "community" or project you like, that might be a good reason to select a particular board.

In addition, I find "porting" projects between these similar FPGAs is typically not very difficult (but perhaps not ideal when just beginning).  For many projects it is mostly a matter of changing which FPGA "pin" is hooked to the hardware signals (typically specified in a single ".pcf" file) and perhaps tweaking PLL settings (for different master clock speed).

Simulation is great! Especially when starting out and learning Verilog/VHDL (much faster iteration).  It is also kind of required for testing and debugging complex FPGA designs (since difficult to add "debug prints" or probe signals inside a real FPGA non-invasively).  You don't need hardware at all, just get Icarus Verilog, Verilator or GHDL along with GTKWave (or vendor/other equivalents) and you can get started with FPGA design.

There is a bit of a learning curve to writing a non-trivial "test bench" (test code added in simulation to replace hardware signals [like a clock] and "exercise" the test design) for a more complicated design.  For example to properly test a "foo IC" interface FPGA design, you might need to simulate (at least some aspects of) the "foo IC" in the test bench.

Still many people (me included) still like to *actually* see an LED blink or a VGA screen image pop-up. :)  Also, it is not hard to do something that "works" in simulations, but not synthesis on real FPGAs (either things that are an error or ignored by synthesis tools, or a "real world" timing or other problem - like all HW projects).

I don't worry too much about FPGA power consumption for my hobby purposes, but these small FPGA boards seem similar to small MCU dev boards (like ~80-200 mA range, depending on LEDs lit).  The power usage in an FPGA is related to how many "transistors" switch in a given time period (in addition to static power usage), so depends a lot on the design. There are some special "vendor primitives" that can control some power options also (like PLL "low power mode", or "freezing" inputs, etc.), but I have not used them.

Overall FPGAs are not known for power efficiency, but these smaller Lattice parts are somewhat of an exception (e.g., I believe even used in an iPhone).  Searching around, I see 75 micro-watts typical "static power" for the ULP version, didn't find max or typical numbers (since it is design dependant).  I have heard of people making designs crammed with flip-flops that toggle as fast as possible to test "max" power and heat for FPGAs.  When I have run a fairly complex design on IceBreaker (like RISC-V SoC with video) it seemed the FPGA might have got a tiny bit warm, but the FTDI chip seemed hotter to me (unscientific test). :)

Al Williams tutorials using the IceStick should translate to the iCEBreaker or Upduino 2.0 (https://hackaday.io/project/159720-fpga-bootcamp-0) and are a good intro to the iCEstorm FPGA tools.

However it may be better to buy exactly what's specified in the tutorial to focus on learning the material and avoid getting bogged down in dealing with potential differences. I'm guilty of doing this often, and inevitably I don't complete the tutorial.

@ajlitt you make a really good point that for a beginner, perhaps it's best to look for tutorials, vendor and community support for the hw in question. 

A board that brings out as many of the I/O pins on the FPGA as possible would be my first vote.

Are you planning on experimenting with processors on your FPGA board? A lot of the FPGA boards have DDR and flash chips on them that tie up I/O pins. These are good if you want to build processor based projects, but bad if you just want to build logic projects.

Some of the boards have a USB connector and on-board USB interface which can simplify stuff a lot if you want to build things that need to talk to your PC. Opal Kelly boards are the ones that I have used with this feature.

Newer FPGAs have good clock generation support internally. Older/simpler ones benefit from external clock generators that offer division and multiplication from a fixed oscillator.

@Bharbour thank you - the idea to think about logic vs processor projects is a good one. Thanks for the other tips too.