Having thought it over, I realised the bias diodes couldn't be the problem - as temperature increases, the forward voltage would actually decrease, making the sense amps _less_ sensitive, not more. They're not really very close to possible heat sources (e.g. H-bridge modules) anyway. So this probably rules out heat effects on the current gains of the sense amp transistors also.

All other transistors are limited by base-collector Schottky diodes, so I don't think self-heating is going to have much effect in, for example, the H-bridge drivers. I might be wrong.

How about the cores themselves? I found a paper published in 1959 describing temperature compensation measures adopted by the designers of a mobile battlefield computer (MOBIDIC) that was rated for operation between -30 to +55 deg C. In the paper the authors make the point that the warmer a core is, the faster it will switch, and the larger the resulting sense pulse amplitude will be. The converse of this is, the warmer a core is, the more careful you need to be with half-select currents, to prevent data corruption.

So I'm wondering if by running a continuous memory test, the cores are warming up, generating larger sense pulses, with the weaker cores eventually producing signals of sufficient magnitude to reliably set the output flip-flops. If this is the case, then some small heating pads attached to the rear of the bit planes might solve this problem.

Some more experimentation should tease this out. Watch this space.