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Hacking a FE-5680B rubidium reference clock

Sold as "1pps only", this affordable eBay find is a playground for reverse-engineering, with a few useful laboratory applications.

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2016-10: Project shelved. The unit fried :-(
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I got a Rb frequency reference ! I guess that makes me a time nut now...

I try log all the steps, data, informations, hacks and finds about this unit I just received, which is subtly different from the more common FE-5680A, but as capable.

Thanks for the feature at http://hackaday.com/2016/05/04/a-rubidium-reference-for-discrete-component-clocks/ !

A very stable reference frequency generator is required now that I must calibrate the 18KHz and 32768Hz clocks (#Yet Another (Discrete) Clock and #Clockwork germanium). I also want to drive my #Quick & Dirty Frequency Generator

I have found many useful resources on the 'net but this particular model has interesting resources scattered around websites. Furthermore, my experiments found other useful signals.


Other Rb projects on HaD:


Pinout of the HD15 connector:

  1. +15Vcc (2A peak at power-on, slowly decreases to 0.6A when warm, it is recommended to use abundant filtering to prevent HF from the PSU to interfere with the output frequency)
  2. GND
  3. +5V (marked "optional" but no jumper. This model generates 5V inside with a buck regulator. I found and shorted the right pads to provide this power to the outside, to power minimal circuits)
  4. GND
  5. 10MHz output (only output a few seconds after reset, then unavailable. Can be reused for other purposes if it is rewired on the PCB at the CPLD's output)
  6. "Spare" (no idea what it is)
  7. GND
  8. "Analog tuning / optional" (not used)
  9. "Reserved / Factory test output" (not used)
  10. GND
  11. 1PPS output (LVTTL, 10µs pulse, optional, valid when locked)
  12. Lock (open collector output)
  13. Reset input (LVTTL Active high)
  14. Serial data in (LVTTL) (not tested, not sure it is implemented, not found by others to respond to known protocols)
  15. Serial data out (LVTTL) (not tested, high level found so it's implemented but no idea of what protocol it is)

Logs:
1. Links and resources
2. Providing the internal 5V on the HD15 connector
3. Where to get some interesting frequencies ?
4. Lock achieved
5. Ups and downs

RubyWriteup.pdf

Andre Lubbock hacks his FE-5680B.

Adobe Portable Document Format - 2.12 MB - 05/02/2016 at 04:50

Preview Download

FE-5680A_schematics_v0.1.pdf

partial schematic of Model A (useful for some hints but must be carefully checked)

Adobe Portable Document Format - 28.52 kB - 05/02/2016 at 02:48

Preview Download

  • Ups and downs

    Yann Guidon / YGDES05/05/2016 at 21:39 0 comments

    The block fried.

    I've left it alone after the lock, to write the previous log and then returned to the workshop where a smell of burned resistor worried me. The current was bumped to 2.6A, 2A more than normal.

    Then, this happened.

    http://hackaday.com/2016/05/04/a-rubidium-reference-for-discrete-component-clocks/

  • Lock achieved

    Yann Guidon / YGDES05/02/2016 at 06:55 0 comments

    And achievement unlocked :-)

    I don't know how long it took (10 minutes ? I'll have to measure next time) but the "lock" output has finally been asserted.

    Parameters: Ta=18°C, 15V, 0.60A when settled.

    The unit rests on bubble wrap to insulate against heat losses through conduction with the table, yet the other side is exposed to free air to prevent overheating. The question of insulation vs heatsinking is pretty complex but a mixed approach should work. Too much heatsinking and the unit will draw too much current to heat the Rb lamp to >100°C and locking might take a very long time, if ever.


    I measured again : from a cold start, the block took 13 minutes to lock while the current was 0.7A (not yet settled to 0.6A).

    This is pretty long and it could be a sign of old age (or a cold room), but this is not critical for my occasional needs. Maybe I'll have to get it recalibrated, or buy a second one... one day.

  • Where to get some interesting frequencies ?

    Yann Guidon / YGDES05/02/2016 at 02:04 0 comments

    The seller's description of this object is "FEI fe-5680b rubidium oscillator With 1pps 20mhz output ONLY/10mhz NEED to MOD" and it includes pictures showing the PCB. The "NEED to MOD" part makes it clear that the box must be opened.

    The 1pps signal should be directly available on pin 5 of the HD15 connector. The only catch is that it only appears when the clock is locked. Some more practical considerations are provided in "I can't see the 1pps output!".

    (I haven't see it yet so I presume I've not turned it on long enough for a lock)


    The advertised 20MHz is explained by the seller : find it on the PCB and solder a wire.

    You may even get some 60MHz on the other side of the board :

    So far, so good and I've found the 20MHz as expected.


    Now, somewhere (I'll probably remember the link one day) I found the schematic (somewhat reverse-engineered) of the model A. This is not model B but some similarities are striking. In particular there is the same Xilinx CPLD with those interesting signals:The CPL gets 60MHz and outputs 30MHz, 20MHz, 10MHz and 1pps.

    Several attempts have been made to dump the CPLD's configuration but that's not really interesting, as the lower-left corner shows the interesting part: this is the 60MHZ input (coming from the clock generator).


    Is this valid for my model B?

    The probe peeked at that pin and found the expected high frequency signal. Looking around, I found that this signal is available on a testing point (just like the previous 20MHz), so there is no need to hack the other side of the PCB !

    I also notice something else : this signal appears to be coming from the collector/drain of a transistor, so it might be already amplified and this would reduce interference with the clocking subsystem.

  • Providing the internal 5V on the HD15 connector

    Yann Guidon / YGDES05/02/2016 at 00:56 0 comments

    The FE-5680 family has so many variants !

    Some need an external 5V power supply, others generate it internally.

    The external supply makes sense to save a buck or two on a buck (pun) converter and its parts. The other solution is good to keep the modules count down. So the parts of the converter may or may not be soldered.

    This is illustrated on figure 4 of http://www.ka7oei.com/10_MHz_Rubidium_FE-5680A.html where one unit has no parts (and gets a replacement) and the other is populated.

    More interesting is the hack that brings the internal 5V to the main connector. For reference, the picture is there :

    Now, I had to deal with two things

    • I don't have this model, the connector and the PCB are different.
    • I forgot where I found this picture.

    But in order to get the lock signal conveniently, I need some voltage to pull up and/or light an LED. So let's find which jumper goes to pin 3 of the HD15 connector. Fortunately

    • The board is not radically different
    • I had a vague souvenir that there was a pad to short near the edge.

    What did I do ?

    I wired a 100K resistor to the 'scope's probe test point (2Vpp square) and hooked the signal to the HD15 pin. Simultaneously I probed the pads that I thought would be the best candidates.

    Examination of the PCB near the HD15 pins shows that there is at least a filtering capacitor (and even probably a Pi C-L-C network). So of course the signal would be distorted but the frequency is low enough to pass and appear as some sort of sawtooth.

    After carefully checking I bridged the pads with solder and I got 5V !

    Of course, don't do this at home, kids. Since many models are different, the configuration might be somewhere else, see how it changed from model A to model B !


    Ah yes this hack is also explained in Ruby Writeup (I mirored the PDF here). I have read his explanations and this hack was not clear to me at that moment, but I memorized it. When I needed it, half a day later, it was obvious I had to do it too. So no, I didn't invent this ;-)

  • Links and resources

    Yann Guidon / YGDES05/02/2016 at 00:45 0 comments

    This log summarises the documents I have found about the FE-5680 family.

View all 5 project logs

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