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Getting Ready for Reverse Engineering

A project log for eeColor Color3

Reverse engineering the Color3

Tom VerbeureTom Verbeure 04/09/2018 at 01:000 Comments

(Also published here.)

Today was all about getting set up for reverse engineering the board connections.

The SDRAM, LEDs, buttons, and FTDI chip connections have already been figured out in the past, but the Silicon Image (SI) chips have not. And those chip are really what makes this board so interesting.

The SI chips are using a TQFP package, which makes it easier to figure out the connections from those chips to the FPGA.

Here's one way of doing it:

Right now, the minimal design with the SignalTap synthesizes, but I'm not able to program the FPGA with my dirt cheap knock-off USB Blaster interface. Sometimes Quartus is able to identify the FPGA, sometimes not.

When I connect the USB Blaster dongle to my EP2C5 mini board, it's working fine, so tool permissions etc should be OK.

I think it's a matter of signal integrity of the USB Blaster clone. Tomorrow, I'll try again with a high quality Terasic USB Blaster clone that we use at work.

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