Phased Array Microphone using FPGA

The idea is to do DSP on a FPGA with audio from microphones.
This is a project I've started in order to learn FPGAs and Verilog.

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I want to learn FPGAs and to do that I needed a goal.

The idea is to do stuff to audio streams coming from a constellation of omni microphones.
Some ideas:
- Determine the origin vector of a sound sample
- Beam shaping.
- Adaptive filtering

The first steps will be making small microphone modules that conditions the audio - amplification and filtering - then converts it to 8 bit audio. After one initial prototype I will have to manufacture a bunch of these modules. Yes, I know theres a lot of cheap MEMS microphones that does this all in one package - this might be more fun.

Second step will be to make a controller board that collects all the data lines (maybe matching the transmission lines) and buffering the clock line.

The third, and final, step will be experimentation and the main goal; to learn practical FPGA designing with custom hardware.

For now I have started to learn Verilog. To learn FPGAs I have two boards; a Cyclone III Dev board from Altera and a Xilinx (can't remember the name of the board).

I have also ordered some cheap-o parts from China to build the modules:

  • Two different brands of omni microphones. I thought I'd do some comparison.
  • Transistors for a simple discrete amplifier design: C945
  • ADCs the cheapest I could find in bulk that still met the very low requirements: TLC549CD
    • 8 bit
    • well above 10k SPS

More info will be added as I go along.

  • 10 × TLC549CD Data Converters / CheaAnalog to Digital Converter ICs (ADCs)Chea
  • 10 × C945 Discrete Semiconductors / Transistors, MOSFETs, FETs, IGBTs
  • 10 × 9.5mm Electret Condenser Microphone
  • 10 × 9.7mm Electret Condenser Microphone

  • Preliminary design of the microphone modules

    Martin Berglund07/04/2016 at 21:28 0 comments

    As I am working on the FPGA I took a break to design the microphone modules for this project.

    I'm unsure weather I need to impedance match the signal lines since the speed is moderate. The cable from the hub to each microphone will be a 5 pole, 600+ mm long, ribbon cable with a characteristic impedance of about 120 Ohm. All the values are preliminary and I need to breadboard this when I get the parts to test the levels.

    I ran the amplifier through simulation to confirm the filter design. The filtering isn't much to write home about but the gain is actually pretty good. I still have no idea of what the microphones will put out but I think this is a start, worst case ill have to do two stages and some more filtering. I plan on using so i have 50x50mm to work with...

    This far I have a pretty solid idea for how the system is going to work.

    I want the final data to the computer to be a mono audio stream in one direction and commands going the other direction. I have a good STM32F4 library to do the USB interface with. To keep the FPGA design simple I'll implement an SPI slave with an optional IRQ line between the FPGA and the STM32F4.

    The HubBoard will need to do level shifting, possibly impedance matching, and buffering of the CLK and CS lines.

    I put up the project in a GitHub repo at:

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Martin Berglund wrote 07/04/2016 at 23:25 point

Yeah I know, I thought this might be more fun. 

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zakqwy wrote 06/23/2016 at 00:06 point

Super cool! I used to sell 3D level scanners for grain bin inventory measurement; they used a trio of transducers operating in the audible range set up as a phased array. Pretty cool tech, looking forward to seeing what you come up with.

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Martin Berglund wrote 07/04/2016 at 22:33 point


I think the microphone array will be a fun platform to play with, once I get it up and running, I have lots of small ideas.

So this grain measurement system, didn't the grain absorb much of the sound? Or was that the point, only getting strong reflections from the silo sides?

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