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optimised interrupt handler for less jitter in TDMA window

A project log for Off-grid GPS (race) tracker client and server

GPS tracker map server and client for use in remote locations with no internet coverage or mains power.

stevesteve 08/23/2016 at 11:130 Comments
//pseudocode
void loop()
{
    //if the current timestamp 'seconds' matches our device's transmission slot,
    // then do nothing else other than sit in a super-tight loop awaiting the interrupt
    if (systemSeconds == txSlotSeconds) {
        //do nothing else but loop tightly, awaiting PPS interrupt
        while (PPSflag !=True)
            {
            }
        //PPS flag is True - go and transmit straight away!
        //delay if necessary for inter-second timeslots
        delay(txSlotMillis); //or micros if needed!
        LoRa.Transmit(packet);
        PPSflag=False;
    } else {
        //we are not due to transmit in the next second, so go and do other things - 
readVoltage();
updateTime();
updatePosition();
constructDataPacket();
}
}

I think this will work for devices that need to transmit on the second (i.e. txSlotMillis==0), as our code will start its tight loop in the second PRIOR to the scheduled txSlotSeconds, and wait in the tight loop for up to 1 second for the following PPS to come along.

Doing a really crude measurement of a loop with digitalWrite(high);digitalWrite(low), the Cortex M0 with arduino compiler executes a loop (including 2 GPIO writes) in 3.6 microseconds. Each GPIO write takes16 clock cycles (various google sources differ for this), giving a corrected loop duration of 3 microseconds

I need to work out how to do the loop in assembler perhaps, then our loop just needs to be a few clock cycles: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0432c/CHDCICDF.html

tight while loop:

//does our register (pps flag in r0) eq 0?
mov r1,#1
loop:cmp    r0,r1;       // compare pps register to 1
brneloop ;                 //branch if not equal
nop;                           //exit loop

cost: 1 cycle if not equal, 3 cycles if equal (from ARM reference material)

Interrupt latency: 16 cycles (various sources)

ISR: 1 cycle ( mov r0,#1 )

this gives a tight loop with interrupt-exit in about 18 cycles (probably missing something here)... or 0.375 microseconds at 48MHz

I'm sure the limit on TDMA will now lie with either the HopeRF LoRa transmission timing or in the receiver.

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