The video in the first log entry shows a 4-bit integer square root circuit made from siphon logic. Here is a schematic drawing of the circuit:

The input is the 4 bit binary number X, represented by bits X0,X1,X2,X3 (X3 is the most significant bit). The output is the 2 bit binary number Y, represented by bits Y0,Y1. The AND gates on the X2 and X3 inputs are needed because in the siphon logic implementation of this circuit these inputs feed into 2 gates each, and the AND gates effectively duplicate the inputs (see the earlier log entry explaining this).

Here is the siphon logic implementation of this circuit, with gates positioned in the same relative locations as in the schematic:

You will notice that because siphon logic uses a dual rail representation for Boolean values there are two inputs and outputs for each binary digit : the input subscripted with 0 represents the digit when it has a value of 0, and the input subscripted with 1 represents the digit when it has a value of 1.

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