A project log for FPGA Vision
Open fpga image processing
Setup git repo. Now one can follow dev.
Meanwhile still trying to get the timing on RS232 recieve to work.
Create an account to leave a comment. Already have an account? Log In.
Yes, delete it Cancel
By using our website and services, you expressly agree to the placement of our performance, functionality, and advertising cookies. Learn More
JLAM
Discussions
Become a Hackaday.io Member
Create an account to leave a comment. Already have an account? Log In.