Using a decade flash ADC, which is to say ten comparators strung along a ladder voltage divider with equally spaced rungs (which is to say a divider with taps at 1/10, 2/10, 3/10 ... 9/10,10/10)... Okay, let's just say a bar graph driver with ten equal steps. If you use logic to isolate only the top active step, that can be fed directly to a nixie driver and activate one filament at a time corresponding to the peak measurement. If you latch that output, you can use your comparator outputs (either combined in a summing amplifier, or using the topmost output to switch its reference voltage) to drive a differential amplifier subtracting that sample value from the original signal value. That will leave a residue voltage corresponding to the decade below your 1/10 value, which feeding that residue back through the comparator network with a 1/10 reference (into the divider ladder) will yield a measurement of the next lowest order of magnitude. This can be latched to drive your next nixie tube, and then repeat with its residue.
In this way you can successively measure orders of magnitude of a voltage value and directly drive nixie tubes as a voltmeter. With each iteration, however, component tolerance errors will cascade reducing precision.
The logic-isolated comparator outputs can also be fed into a BCD converter for BCD outputs.
If ten comparators are used in the ladder, the logic-isolated output would directly correspond to 4-bit binary. A second iteration would yield exactly an 8-bit ADC output.