Technically you could do binary conversion with a single comparator, and subtract then recycle the residual with a halved reference each iteration. But then you'd basically have a slow SAR. And that's boring. Plus without stupidly high-tolerance components you'd lose precision with each iteration. If you use 0.1% components, after four iterations your cascading error would be as high as 0.4%, above the LSB precision of an 8-bit converter. At 8 iterations you'd be looking at 0.8%, invalidating your lowest two bits of precision.

UNLESS - with each iteration you go back to the original signal and subtract the full binary measurement to date (probably using summing amplifier DAC would be easiest), which then the residue doesn't get obscured by cascading measurement error. I'd probably use a system like that on the tenths direct-driver nixie VRM because I'll probably want 3 or 4 decimals of display which means multiple iterations. Actually, that'd be pretty difficult unless I also held the divider value after each iteration to make summing easier. With each iteration grab the previous summed value and add to it the current order's value, then hold that for finding the current order's residue and for adding into the next order's absolute measure value. But that seems unnecessarily complex. A 3-digit display would only see 0.3% error which is probably good enough.

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