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STEbus FPGA board

STEbus FPGA board

keithKeith
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I have many ideas for STEbus boards, but most of them differ only in the CPU for bus masters.
So I intend to design a board that can be a bus master or slave, and have an FPGA at the core.
That will handle the bulk of most designs, with just a prototyping area to hold a particular CPU or application-specific circuitry. Most CPLD and FPGA chips are moving to voltages lower than 5V, so there will be many voltage shifting buffers. That is not so bad, as buffers are needed to drive the STEbus anyway.

Modern memory chips are also 3V3 or less, so that is another thing to keep near the FPGA.

I started this page as a placeholder in 2018, but lacked the time to implement it. In 2021 Benoit told me  that he had implemented such a project. Glad to see my evangelical work has encouraged others to adopt STEbus!

The project so far is Benoit's work, and he graciously allowed me to make it public.

Right now I am busy pursuing paid work, but I shall have a look at Benoit's works soon and make comments.

In the meantime, enjoy reading about it.

UniversalFPGA_STE.zip

Kicad project of the FPGA_STE board

x-zip-compressed - 1.26 MB - 06/09/2021 at 19:20

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SlaveTest.zip

VHDL code for the FPGA STEbus module, to turn it into a STEbus Slave module, with 16 digital inputs, 16 digital outputs, 2 analog outputs and one analog input. See comments in the main file for details about I/O addresses used by the FPGA. IMPORTANT : the Universal FPGA module must be configured as a Slave (see user's manual)

x-zip-compressed - 10.84 kB - 04/01/2021 at 19:15

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Universal_STEbus_FPGA_Module_User_Manual.pdf

Adobe Portable Document Format - 9.13 MB - 03/07/2021 at 08:47

Preview
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UniversalFPGA_STE.pdf

Schematic diagram of the first version of the motherboard, currently being manufactured (delivery expected for March, 11th)

Adobe Portable Document Format - 378.48 kB - 02/26/2021 at 06:10

Preview
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DE0-NANO-dimensions.ods

Converts mm to inches. Connectors not exactly on 0.1" grid!!! :-(

spreadsheet - 6.68 kB - 02/23/2021 at 02:22

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View all 6 files

  • Development software installation

    Keith • 05/22/2021 at 18:21 • 0 comments

    2021-05-21

    I've been putting this off because it looked like a chore. But it is not going to go away, so I'm biting the bullet...

    First of all I went here to collect the software and manuals:

    https://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&CategoryNo=139&No=593&PartNo=4

    Looks like I need Quartus II Software 13.0 from Altera.

    The 'Pro' and 'Standard' editions need a paid licence, the 'Lite' version is free.

    I downloaded the Linux version from here: https://fpgasoftware.intel.com/?edition=lite

    Installed easily, I managed to open Benoit's project file and found the user interface is very similar to the Xilinx software, so I should be able to get going with my own projects pretty quickly. Wonderful!

  • Journal

    Keith • 02/23/2021 at 00:09 • 0 comments

    2018-05-13 Started this project as a placeholder. 

    2021-02-12 benoit Informs me of his design, which uses an Altera DE-nano board. This saves me the job of designing such a board, and I shall simply use his design for the Ideas I wish to develop.

    I am keeping this project private for now, because it is his project more than mine until I make a design of my own. I am using his images as eye-candy for the front page.

    2021-02-23 FPGA board ordered from Digi-key.

    2021-02-25 FPGA board arrived. Yay!

    2021-04-07 Parts from Digi-Key ordered.

    2021-04-09 Parts from Digi-Key arrive.

    2021-05-03 Soldered SOIC buffers onto one board.
    Not as nice to do at home as at work which has a microscope and better soldering iron. But it is just for prototyping work. 

    2021-06-03 Soldered many components, mostly surface mount. I used imperial 0603 size, as that was standard stock. Nearly complete.

View all 2 project logs

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