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Transfer Instructions

A project log for BREDSAC

Electronic Dynamic Storage Breadboard Computer

gregewinggreg.ewing 06/20/2018 at 10:560 Comments

The two Transfer instructions, T and U, transfer the contents of the accumulator to the main memory. The difference between them is that T also clears the accumulator, whereas U does not.

These are the first instructions we've implemented so far that write to main memory, so we need a new control signal, WMEM. This is gated with phase 2 of the bit clock so that writing to memory occurs only during the write phase of each bit time.

Updated main memory subcircuit:

I also made a change to the data path in the main circuit. Instead of the data input to the main memory coming from the output of the ALU, it now comes from the multiplexer feeding the X input of the ALU. This will enable me to clear the accumulator at the same time as writing it to main memory for implementing the T instruction.

Revision to the main circuit:

Microcode

The T instruction selects the accumulator as the source for both inputs to the ALU, and enables writing to memory. It also sets the ALU to perform subtraction, thereby subtracting the accumulator from itself, giving zero, and writes this back to the accumulator.

The U instruction simply selects the accumulator as the X input and writes it to memory.

# OPCODE L STAT : FETCH MASEL SHS EOI RFA1 WRF1 XSEL YSEL CMX AND CY1 CYP ODD MSW LSW HALT WMEM

# T - Transfer and clear
   00101 0 0001 :   0     1    0   1   110   1   10   10   1   0   1   0   0   1   1   0    1

   00101 1 0001 :   0     1    0   0   010   1   10   10   1   0   1   0   0   0   1   0    1
   00101 1 0010 :   0     1    0   1   110   1   10   10   1   0   0   1   1   1   0   0    1

# U - Transfer without clear
   00111 0 0001 :   0     1    0   1   110   0   10   00   0   0   0   0   0   0   0   0    1

   00111 1 0001 :   0     1    0   0   010   0   10   00   0   0   0   0   0   0   0   0    1
   00111 1 0010 :   0     1    0   1   110   0   10   00   0   0   0   0   1   0   0   0    1

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