Close

Improving the Microassembler

A project log for BREDSAC

Electronic Dynamic Storage Breadboard Computer

gregewinggreg.ewing 11/11/2018 at 04:533 Comments

In an effort to make the microcode source more readable, I added the ability to define named constants to the microassembler. They can be referenced anywhere in the source file, and they simply get textually expanded into their definitions.

This is what the microcode looks like now. While still not exactly crystal clear to the uninitiated, I hope you'll agree it's better than it was.

AddressBits := 10
DataBits := 32

# Unused field values
- = 0
-- = 00
--- = 000
---- = 0000

# Single bit values
SHS = 1  # Shift S Register
EOI = 1  # End of Instruction
CMX = 1  # Complement X
ODD = 1  # MSW of double word memory reference
MSW = 1  # Most significant word
LSW = 1  # Least significant word
SS1 = 1  # Shift S Register by one bit
WMEM = 1  # Write memory
INCMS = 1 # Increment multiplication step counter
MMSW = 1  # MSW of multiplicand
MLSW = 1  # LSW of multiplicand

# WRF values
WAC = 10  # Write Accumulator
WMR = 01  # Write Multiplier Register
WPR = 11  # Write Product Register

# XSEL values
X0   = ---  # Zero
XAC  = 100  # Accumulator
XMEM = 010  # Memory
XMUL = 110  # S Register * Nultiplier
XPR  = 001  # Product Register

# YSEL values
Y0   = 00  # Zero
YAC  = 10  # Accumulator
YAND = 01  # Multiplier & Memory
YPR  = 11  # Product Register, or zero if first multiplication step

# Carry control values (CY1, CYP)
CY0 = 00
CY1 = 10
CYP = 01

# MISC values
FETCH = 100  # Instruction fetch
RSH   = 110  # Right shift
HALT  = 001  # Halt at end of instruction

# OPCODE L STAT : SHS EOI  RFA XSEL CMX YSEL CARRY WRF ODD SS1 MSW LSW MMSW MLSW WMEM MISC  INCMS UBCOND UBADDR

# Fetch
   xxxxx x 0000 : SHS  -   --  ---   -  --    --   --   -   -   -   -   -    -    -   FETCH   -    ---    ----

# A - Add
   11100 0 0001 :  -  EOI  11  XMEM  -  YAC   CY0  WAC  -   -  MSW LSW  -    -    -   ---     -    ---    ----

   11100 1 0001 :  -   -   01  XMEM  -  YAC   CY0  WAC  -   -   -  LSW  -    -    -   ---     -    ---    ----
   11100 1 0010 :  -  EOI  11  XMEM  -  YAC   CYP  WAC ODD  -  MSW  -   -    -    -   ---     -    ---    ----

# S - Subtract
   01100 0 0001 :  -  EOI  11  XMEM CMX YAC   CY1  WAC  -   -  MSW LSW  -    -    -   ---     -    ---    ----

   01100 1 0001 :  -   -   01  XMEM CMX YAC   CY1  WAC  -   -   -  LSW  -    -    -   ---     -    ---    ----
   01100 1 0010 :  -  EOI  11  XMEM CMX YAC   CYP  WAC ODD  -  MSW  -   -    -    -   ---     -    ---    ----

# Z - Halt
   01101 0 0001 :  -  EOI  --  ---   -   --   --   --   -   -   -   -   -     -    -  HALT    -    ---    ----

# T - Transfer and clear
   00101 0 0001 :  -  EOI  11  XAC  CMX  YAC  CY1  WAC  -   -  MSW LSW  -     -   WMEM ---    -    ---    ----

   00101 1 0001 :  -   -   01  XAC  CMX  YAC  CY1  WAC  -   -   -  LSW  -     -   WMEM ---    -    ---    ----
   00101 1 0010 :  -  EOI  11  XAC  CMX  YAC  CYP  WAC ODD  -  MSW  -   -     -   WMEM ---    -    ---    ----

# U - Transfer without clear
   00111 0 0001 :  -  EOI  11  XAC   -   Y0   CY0   --   -   -   -   -   -    -   WMEM ---    -    ---    ----

   00111 1 0001 :  -   -   01  XAC   -   Y0   CY0   --   -   -   -   -   -    -   WMEM
   00111 1 0010 :  -  EOI  11  XAC   -   Y0   CY0   --  ODD  -   -   -   -    -   WMEM ---    -    ---    ----

# H - Load Multiplier
   10101 0 0001 :  -   -   01  X0    -  Y0    CY0   WMR  -   -   -  LSW  -    -    -   ---    -    ---    ----
   10101 0 0010 :  -  EOI  11  XMEM  -  Y0    CY0   WMR  -   -  MSW  -   -    -    -   ---    -    ---    ----

   10101 1 0001 :  -   -   01  XMEM  -  Y0    CY0   WMR  -   -   -  LSW  -    -    -   ---    -    ---    ----
   10101 1 0010 :  -  EOI  11  XMEM  -  Y0    CY0   WMR ODD  -  MSW  -   -    -    -   ---    -    ---    ----

# C - Collate 
   11110 0 0001 :  -  EOI  11  XAC   -  YAND  CY0   WAC  -   -  MSW LSW  -    -    -   ---    -    ---    ----
 
   11110 1 0001 :  -   -   01  XAC   -  YAND  CY0   WAC  -   -   -  LSW  -    -    -   ---    -    ---    ----
   11110 1 0010 :  -  EOI  11  XAC   -  YAND  CY0   WAC ODD  -  MSW  -   -    -    -   ---    -    ---    ----

# L - Left shift
   11001 x 0001 :  -   -   00  XAC   -  YAC   CY0   WAC  -   -   -  LSW  -    -    -   ---    -    ---    ----
   11001 x 0010 :  -   -   10  XAC   -  YAC   CY0   WAC  -   -   -   -   -    -    -   ---    -    ---    ----
   11001 x 0011 :  -   -   01  XAC   -  YAC   CY0   WAC  -   -   -   -   -    -    -   ---    -    ---    ----
   11001 x 0100 :  -  EOI  11  XAC   -  YAC   CY0   WAC  -  SS1 MSW  -   -    -    -   ---    -    100    1000

# R - Right shift
   00100 x 0001 :  -   -   00  XAC   -  Y0    CY0   WAC  -   -   -  LSW  -    -    -   RSH    -    ---    ----   
   00100 x 0010 :  -   -   10  XAC   -  Y0    CY0   WAC  -   -   -   -   -    -    -   RSH    -    ---    ----   
   00100 x 0011 :  -   -   01  XAC   -  Y0    CY0   WAC  -   -   -   -   -    -    -   RSH    -    ---    ----   
   00100 x 0100 :  -  EOI  11  XAC   -  Y0    CY0   WAC  -  SS1 MSW  -   -    -    -   RSH    -    100    1000   


Discussions

zpekic wrote 06/18/2020 at 04:40 point

I see very familiar concepts in your microassembler - check out my attempt to build a microcode compiler and use it to implement a CPU https://hackaday.io/project/172073-microcoding-for-fpgas

  Are you sure? yes | no

greg.ewing wrote 06/18/2020 at 07:09 point

Looks interesting! Playing with FPGAs is something I want to try in the future too.

  Are you sure? yes | no

zpekic wrote 06/18/2020 at 15:45 point

Fascinating technology and for hobbyist extra fun as it can be combined so easily with computing retrotechnology. However I wanted to keep the control unit schema and microcode structure so simple that it can be built with few classic ICs too.

  Are you sure? yes | no