Random stuff I do with TTL, CMOS, and transistors. probably lots of programmable logic.

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Sometimes I make logic stuffs


Use the above website to import and simulate the txt files I uploaded to this project.

The circuit simulator is really fun, I spend literally hours on it.  Check out the designs I came up with!


A lookup table made with transistors.

plain - 2.59 kB - 07/01/2018 at 04:13


DTTL inverters.txt

using both an NPN and PNP transistor for logic output

plain - 2.26 kB - 07/01/2018 at 04:13


DTTL double LUT clock.txt

Two LUTS configured as one inverter and one buffer, connected to produce a clock signal.

plain - 6.35 kB - 07/01/2018 at 04:13



NAND gate with both NPN and PNP transistors for logic output

plain - 1.61 kB - 07/01/2018 at 04:13


DML logic family.txt

diode-MOSFET-logic family (insted of DTL)

plain - 2.02 kB - 07/01/2018 at 04:13


  • 999 × CMOS and TTL ICs
  • 999 × NPN transistors
  • 999 × PNP transistors
  • 999 × various resistlors
  • 999 × diodes

  • 2 LUTs made with transistors in the simulator

    Dylan Brophy07/02/2018 at 23:17 0 comments

    Normal voltage requirement is 2v, switches at about 600mV.  All transistor betas are 100.

    The capacitors are for simularing parasitic capacitance.

    The above circuit is two LUTs connected to make a clock.  One is configured as a buffer, the other as an inverter.  The 8 inputs on the left tell the LUT what values are where.  The inputs on the bottom of the LUTs are the address.  The image above is at two volts input power.

    The circuit can take voltages up to about 11v before the logic stops working. This is at 11V to see how it switches right before the voltage that it stops working (between 11v and 11.16v).  there is a lot of ringing for some reason, probably due to the small capacitors to simulate parasitic capacitance.

  • single FPGA slice (without routing)

    Dylan Brophy07/01/2018 at 03:31 0 comments

    I felt like building an FPGA slice, so I did.

    Based somewhat upon Nick's Blog entry here.

    Sorry for the bad photo, my phone has issues.  

    Essentially the bottom three ICs are 74hc595 (CMOS logic levels) for allowing an arduino to program the slice.  The three ICs up top are two 8:1 MUXs and two D flip flops. The oscillator up top is connected to the D flip flops, so they always have updated values.

    I used CMOS chips because I did not have enough TTL MUXs, even though I have plenty of every other TTL IC...

    I may consider making many FPGA slices and connecting them together one day, with printed PCBs and such.  Those would have DIP switches instead of 74595s because DIP switches are more fun to program.

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Enjoy this project?



Yann Guidon / YGDES wrote 07/10/2023 at 22:05 point

Sadly there is no recent update.

  Are you sure? yes | no

Dylan Brophy wrote 07/23/2023 at 19:18 point

Indeed.  I haven't had as much time since I graduated HS and got a job, but I now do engineering work professionally so I don't mind.  I feel like I will come back to it someday, when I need a break from my work to do something more lighthearted XD

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Blair Vidakovich wrote 07/02/2018 at 22:03 point

the circuit simulator is amazing!!!

thank you so much for putting all of these schematics together!


  Are you sure? yes | no

Dylan Brophy wrote 07/02/2018 at 22:46 point

No problem!  I am glad someone found them and enjoys them so fast.  I will be sure to post more sometime.

Which circuit is your favorite?

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