Scott
Wait_State_Generator-8Mhz-0ws_Live.pdfProgrammable wait-state generator, logic analyzer capture, 8MHz/0ws, M1 = 240nSAdobe Portable Document Format - 12.59 kB - 10/20/2016 at 21:37 |
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Wait_State_Generator-8Mhz-7ws_Live.pdfProgrammable wait-state generator, logic analyzer capture, 8MHz/7ws, M1 = 1120nSAdobe Portable Document Format - 13.29 kB - 10/20/2016 at 21:37 |
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Wait_State_Generator.jedProgrammable wait-state generator, JEDEC filejed - 4.42 kB - 10/20/2016 at 21:36 |
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WSGEN-1V00.siProgrammable wait-state generator, logic equations- 2.67 kB - 10/20/2016 at 22:07 |
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WSGen-1v00.PLDProgrammable wait-state generator, simulation input- 3.16 kB - 10/20/2016 at 22:12 |
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Z80_IOdecode-1V10.jedZ80 address decoder; JEDEC filejed - 1.88 kB - 10/20/2016 at 21:34 |
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Z80_IO-1V10.siZ80 address decoder; simulation inputsi - 2.80 kB - 10/20/2016 at 21:32 |
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Z80_IO-1V10.PLDZ80 address decoder; logic equationspld - 2.56 kB - 10/20/2016 at 21:32 |
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DSC00787.JPG"Functional Test" board w/ Z80, ATmega328P,, AT28C256 (E2PROM), ATF16V8B (addr-decoder) and GAL22V10D (prog WS Gen)JPEG Image - 2.43 MB - 10/20/2016 at 21:27 |
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Z80_Computer_1v10.pdfCurrent design (will be updated) but not complete as it is a work in progress. This schematic is only for reference purposes.application/pdf - 31.51 kB - 10/20/2016 at 21:30 |
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DSC00784.JPGBasic parts for the Z80 SBCJPEG Image - 2.36 MB - 10/08/2016 at 08:12 |
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Z80 Single-board computer (with AVR controller)
Another Z80 single-board computer.