Are there any CPLD architectures that can store more than 1 bit per logic element?  The size of my register file is getting quite large, and I'd really rather not have to use an FPGA for it, but none of the CPLDs I've looked at come anywhere close to having enough registers.

That said, FPGA prices are much lower than I remember them being last time I used one.  I can get Spartan 6 XC6 (or, I suspect, cheap Chinese clones thereof) for only about double the cost of a cheap CPLD.  Implementing the entire processor in one would definitely feel like cheating, but I suspect I'd at least be able to come close.  It has 64KiB of Block RAM, which means the largest sensible configuration of RAM for the processor would use all of it. It also has around 5,000 LUTs... I'd need to use some of those to implement the register set. Something like 1,500 of them would disappear into that, leaving 3,500 of them to implement whatever I wanted.  That sure sounds like it should be enough for the entire processor.

But that violates the spirit of a vintage project.  I'm only using modern parts to replace older parts that aren't available.

Maybe just a prototype?  I've been planning a verilog implementation simply to check that my timing ideas are plausible, which makes it so tempting just to put it onto an FPGA on a board and hook it up to a host system to see what it can be made to do.