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Memory Pointers description

A project log for ECM-16/TTL homebrew computer

16 bit Computer made from ttl logic chips

pavelPavel 12/24/2021 at 21:050 Comments

There are 8 16-bit registers paired to yield 4 effective 32-bit Memory Pointer Registers. Each of these 8 registers can be accessed and written to independently. But they are used in pairs as source of memory address. In some cases they provide direct address, while in others, these memory pointers contain a base for address, while the address itself is calculated as this base plus some offset value, which can be provided from one of the General Purpose Registers, or from immediate value in memory right after the instruction word.

Of these Memory Pointers, the first one, the Program Counter (PC) is special in a sense that it is implicitly used for fetch cycle at start of every instruction execution sequence as the source of address of that instruction, and has its value updated each time. It also is the implicit register for loading new instruction address in Jump instructions. Otherwise it can be accessed the same way as all three other MP registers.

For these other 3 Memory Pointers, the distinction between Stack Pointer (SP), Frame Pointer (FP) and Base Pointer (BP) is only conventional, and they are really fully interchangeable.

In the instruction set I am developing, there is no dedicated operations related to stack -- all the needed memory transfers for creating a stack structure are already present in a set of Load/Store operations.

The list of main instructions/instruction types is presented in separate log entry together with state machine description.

The in-depth instruction descriptions are presented in separate project.

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