• Memory editor and triggers

    Marek Materzok08/13/2019 at 21:04 0 comments

    Two big features went online recently: memory editor and triggers.

    Memory editor allows to inspect the contents of ROM/RAM cells and to modify it. The feature is especially important for simulating CPUs and similar circuits. If a register bank is implemented via a multi-ported RAM, its contents can be inspected thanks to this feature.

    Triggers allow to stop simulation on a certain event: an edge for a one-bit signal, or a value appearing on a multi-bit signal. This feature is meant to be a help for debugging circuits. Single-stepping synchronous circuits got easier: you can now trigger on a clock signal, and then fast-forward to the next clock edge.

  • Performance improvements

    Marek Materzok08/08/2019 at 10:10 0 comments

    For a long time, the project had a slight performance problem. Because of how the JointJS library - which is used to display gate schematics - is designed, a lot of unnecessary DOM calls were happening, which were slowing things down. Fortunately, recently a new version of JointJS was released, which addressed this very problem. As a result, displaying larger schematics is now much faster.

  • Now with waveform display!

    Marek Materzok10/28/2018 at 11:54 0 comments

    I've extended DigitalJS so that one can display waveforms for selected wires in real time. Just hover the mouse over a wire, click the blue loupe icon, and that's it! The waveform display can be mouse dragged, and the scale can be changed by using the mouse wheel. I tried to make the display as readable as possible. Please let me know about any issues you find!