This is a fairly straightforward implementation of a GPIO interface for the
Apple II, based on a pair of 6522 VIAs. It is an extension of a design
published in c't Magazine in 1985, with the control lines on each 6522 also
brought out to header pins, the data bus buffered with a 74LS245, and the
ɸ2 signal needed by the 6522s generated by a pair of flip-flops in a 74LS74
in accordance with a technote published by Apple on the subject. Most
components are surface-mount to reduce needed board area, though the 6522s
were kept in DIP form to allow use of either NOS (new old stock) 6522s from
whatever suppliers or the currently available WDC W65C22S.