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Firmware architecture depression?

A project log for TestLogger Collector

Datalogging device for designed RC car racing

Jussi LuopajärviJussi Luopajärvi 01/01/2019 at 10:550 Comments

First of all Happy New Year everyone!

Last couple of weeks I've been starting to do a spec for the firmware as the hardware starts to be good enough that I can live with the limitation. The firmware design just feels overwhelming task and even difficult to decide where to start. I've never done a spec for embedded SW and last time I've been doing UML charts was probably around 10 to 15 years ago. I already know quite technical challenges I need to resolve, but before I go that far I need to find a how present the firmware on paper. I bought this book to get some guidance https://www.amazon.com/Real-Time-Embedded-Systems-Principles-Engineering/dp/0128015071

Next step is to learn some good practices what to follow when doing design decisions which is also a challenge as my experience in programming is quite limited. Especially with C.

Last big step is to actually actually resolve the technical challenges and writing the code. For example how to get each channel to log data on correct logging rate. How handle the buffer. In which format the data should be written because data is coming to buffer on different rates.

Do you have any suggestions how to start designing FW architecture based on RTOS? If you have good articles to read and learn, please share. This is probably going to be a long project and just need to take the needed time to do it one step at a time and avoid doing shortcuts.

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If you are interested what I've done so far, here is few images for you.

Screenshot of backlog

First draft of high level design

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