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• SAA5246A features

  Keith • 01/01/2024 at 19:14 • 0 comments

  Complete Teletext decoder in a 48-pin DIL or 64-pin

  • QFP, integrated circuit
  • Single +5 V power supply
  • Both video and scan related synchronization modes are supported
  • RGB interface to standard colour decoder ICs, push-pull output drive
  • Digital data slicer and display clock phase-locked loop reduce peripheral components to a minimum
  • Data capture performance similar to SAA5231 (VIP2)
  • Option for up to seven national languages
  • Optional storage of packet 24 in the display memory
  • Separate text and video signal quality detectors, 625/525 video status and language version all readable via I2C-bus
  • Automatic nODD/EVEN output control with override
  • Control of display PLL free-run and rolling header via I2C-bus
  • VCS to SCS mode for stable 525 line status display.
  • Crystal is 27 MHz (readily available)
  • Uses 8k x 8-bit external SRAM

• SDA5273 features

  Keith • 01/01/2024 at 19:09 • 0 comments

  Suitable DRAM chip: HM514400CS6 Hitachi DRAM 1,048,576 x 4-bit 20 pin SOJ DRAM
  

  Features:
  

  • Single chip teletext IC 
  • Stores up to 14 teletext pages on chip
  • Stores up to 2048 teletext pages with external 16 M memory
  • Analog RGB-output
  • 41 latin script languages
  • 12 × 10 character size
  • Parallel display attributes
  • 64 from 4096 colors selectable
  • Enhanced flash modes
  • Dynamically redefinable character set (DRCS, PCS)
  • Pixel graphics
  • Full-screen display (64 × 32 or 80 × 24 character positions)
  • Horizontal and vertical scrolling
  • Graphic cursors
  • 4:3 and 16:9 display
  • Multinorm display (50/60/100/120 Hz)
  • RISC-processor
  • Firmware downloadable
  • I2C / 3 wire UART-interface (1 Mbit/s) 
  • Independent clocks for acquisition and display
  • Tools for greatly simplified software development
  • PLCC-68-1
  • P-SDIP-52-1
  • 24-kbyte on-chip reconfigurable DRAM
  • 44160-bit character ROM
  • One external crystal for all standards (20.48 MHz or 8 MHz crystal, depending on which data sheet you read)

  Teletext Features:

  • Analog CVBS-input with on-chip clamping circuitry
  • Data Slicer
  • Supports level 1, 2.5 and 3.5 ETSI teletext standard
  • full level 2.5 processing

• Hardware for MV1815 Telepod Module Block Diagram

  Keith • 05/30/2022 at 13:34 • 0 comments

  Telepod Module Block Diagram

  Decoupling: I have put 100 nF ceramics close to chips. I assume the tuner has adequate internal decouplers. I have also put a 220 μF 16 V electrolytic on the 12 V rail.

  My prototype is built on a 100 x 160 mm square-pad Eurocard. The power connector is the same as used on a 5.25" disk drive. This allows it to fit in a standard 19" Eurorack, and take power from a spare disk power lead, but bear in mind this is often an electrically noisy environment and the sensitive decoder section may need shielding.

  If you wish to power it from 12V only (e.g. for use in a car with a laptop) then there is plenty of room left for a 7805 regulator circuit. And a small audio amplifier if you wish.

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  12V to 33V charge pump module

  This circuit is used in Maplin's NICAM tuner project, but here the connections to the hex inverter (HCF40106BE) have been rearranged to make the layout easier. The circuit has been drawn this way to show this. It produces 75 V when the 33 V zener diode and the tuner are not connected. I have not measured the current consumption of this module.

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  Video buffer module

  This is simply a unity-gain emitter follower. The example circuit in the tuner module data sheet did not specify a particular transistor. Perhaps a 2N2222A may be suitable. This should be located near the tuner module.

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  Audio module

  This is simply a unity-gain emitter follower. The example circuit in the tuner module data sheet did not specify a particular transistor. Perhaps a 2N2222A may be suitable. This should be located near the tuner module. The socket is a 3.5 mm jack, as used by common portable stereo earphones. LK1 allows mono audio to be heard in both ears.

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  Teletext receiver module (MV1815 based)

  The 40-pin chip is the MV1815 from GEC Plessey. A more modern design than the Philips family, the use of dynamic memory allows it to address 1 M x 2 bits = 256 x 1 Kbyte pages. In comparison, the 48-pin SAA5246 addresses eight 1Kbyte pages. The DRAM shown here is a 64k x 4-bit 4464. Although half its memory is unused, its 32 x 1K pages is adequate. Especially if pages are cached in the PC. It also saves construction time, cost of sockets, and current consumption. The MV1815 takes 15 mA, the 4464 takes 55 mA, and the optional LED takes about 10 mA. Crystal is 27.75 MHz, rather unusual but I have some free ones spare.

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  LPT to I²C Interface (1)

  This used the least hardware, taking advantage of the open-collector outputs of some LPT signals.

  LPT to I²C Interface (2)

  This circuit is an improvement on (1). The buffers drive the input lines of the cable to the PC, so they do not present capacitive load to the I²C bus. The buffers are powered by the 5V from the application circuit. The type of buffer is deliberately unspecified - you may use spare gates from your application circuit. Note that the buffers should not be at the PC end of the cable where they would provide no benefit!

  You could put this circuit in a small Centronics adaptor box (e.g. Maplin JW56L or JW540) with a Centronics connector socket for a printer cable, and I²C signal outputs. There is no standard I²C connector, but you could follow the Elektor mini-DIN connector convention used in their I²C projects, or the 4-pin FCC68 connector convention used by the AccessBus standard. Irritatingly, neither PCB-mounted connector has pins on a decimal-inch grid used on most prototyping boards, and FCC68 requires a special crimping tool.

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  Disclaimers:

  This design has not been tested, so I cannot guarantee it will do anything. The only thing I can say is that I managed to get teletext data out of the circuit involving the I²C interface number 1, the MV1815 and the 4464 DRAM, using a small MSDOS & C program. The video signal was from the SCART socket of a TV.

  I have tested the tuner circuit. The charge pump works, driving the appropriate tuner pin to 33V. A hiss can be heard with Walkman earphones, exactly like...

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• Software

  Keith • 02/29/2020 at 19:32 • 0 comments

  2020-02-29

  I see that teletext characters have been proposed for addition to the Unicode character set.

  http://teletextart.co.uk/teletext-graphics-characters-among-those-added-to-unicode
  

  https://www.unicode.org/L2/L2019/19025-terminals-prop.pdf

  I don't know what the values are, or whether browsers support them yet.
  

• Hardware

  Keith • 04/01/2019 at 23:30 • 0 comments

  2019-04-01

  Parcel of goodies arrived including MV1815 and SDA5273 chips. I removed the dead chips and fitted new a new MV1815 and 64Kx4 DRAM chip. The phono socket used to be the UHF output from the tuner. As the analogue tuner was dead and obsolete, it has been removed. The phono socket can now be the video input to the teletext chip. The MV1815 outputs are red, green and blue, and will be routed to the RGB input pins of a SCART socket. This project will require a SCART-socketed colour TV, which I have.

  I gave some chips to a workmate to play with. They might be useful as text overlay chips, but all the monitors at work are baseband monochrome. A few colour LCD monitors have SCART inputs. But there are obsolete analogue colour TVs available cheaply on ebay - collection only, they are too heavy to post.

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