This design is a good demonstration of the tradeoffs in simplicity versus efficiency. The use of negative referenced capacitor supplies allows for easy gate triggering. But there’s a lot of wasted power: several watts of apparent power from the capacitive supply and the sunk gate current (35mA) does no useful work. The control circuits don’t do too bad on efficiency except for the half-watt wasted by R13. Then there’s the footprint: the supply caps are huge and the electrolytic caps, while relatively small, require disproportionate space compared to other components. The snubber components, in this case inductors, require almost as much space as the supply caps.
TRIACs are tricky bastards. Their [relatively] high forward voltage requires heat sinking for all but light loads further increasing cost. Add to this their sensitivity to transients and you have a design with limited versatility.
Contrast this to a MOSFET based design. A single, non-isolated, SMPS powered by dual rectifier sections and an 8-bit MCU. A pair of series, source connected, NFETs comprises each switch. Floating flyback drives switch each via PWM outputs from the MCU. The inherent, high transient immunity of the MOSFETs eliminates the need for snubber networks and the worry & dissipation of confirming the output is off before switching. While a bit more complex than its TRIAC counterpart it is smaller and comparable in cost. Efficiency is very high, with a peak power draw under 500mW. MOSFETs, even back-back for each switch, support much higher loads without thermal management. Not buying it? Check out my timer project - it has all the necessary prerequisites.
The only advantage a TRIAC-based design has is commutating off at zero current. MOSFET designs could implement this using the zero cross detector peripheral available in many MCUs along with a number of efficient sense circuits.