With increasing complexities and more FPGA architectures and platforms coming into play, the underlying original MaSoCist setup has somewhat become complex in testing against various synthesis and simulation tools. Plus, it's still VHDL only for simulation, which is sometimes limiting.
And, it's bloody patchwork:
- XML for SoC descriptions translated to HDL config files
- Make-Rules depending on platform
- Ugly CPP (C preprocessor) hacks
- Impossible to document inline and cross-test documentation against functionality
The latest drug developed from Google developers turned out to be the mybinder.org service that runs Jupyter Notebooks. During the Covid19 lockdown, this enabled me to prepare step-by-step instructions on how to have design processes reproduced without having to install exactly the same OS setup and libraries.
Then on the other hand, active development on the yosys side has progressed so far that a fully python featured build and synthesis process gave full browser based synthesis for some architectures a boost.
Bottomline: The future MaSoCist development will fully focus on a Python based processing, being more transparent in what is exactly happening. The expected paradigm shift, outlined:
- CPP hacks gone
- kconfig translation hacks gone
- Inline documentation per Notebook
- Auto-tests and regress tests done from inside the Notebook
- Most VHDL modules and SoC generation ported to MyHDL
- More Co-Simulation functionality with Verilog designs
The MyHDL featured basic environment for synthesis out of the browser (for ECP5 platforms) is found via the sister project https://hackaday.io/project/171216-jupyosys.
Now, here comes the catch: Spartan6 is somewhat aged and efforts in reverse engineering the architecture for yosys support has been considered questionnable. So Place&Route will still be based on the ISE 14.7 toolchain. Means, a legacy MaSoCist for netpp node will remain.
If it comes to a next generation, the netpp node v2 will base on a more 'open' FPGA architecture that supports a robust multi-boot scheme like the Spartan6.