It was a big surprise to receive an email from one of the good folks at CERN.

Even more a surprise when the email says that this library is used for post-synthesis simulation with GHDL !

Even better is the contribution that fills the blanks and adds about 50 missing gates !

It will take a while but the main archive will be updated and will now have much broader use, it will do much more than my own designs but for others who need to replace or even bypass the proprietary tools from Actel/Microsemi/Microchip. GHDL again shows its incredible strengths and now there is a new bridge to the FPGA workflow world !

Many thanks to all the people who make those great contributions to the free and open design tools :-)