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Finished Instruction Set (For Now)

A project log for 8 Bit Breadboard CPU

A home-brew 8 bit Microprocessor built on a breadboard 64K Address Space, IRQ, and DMA 16 Bit Stack Pointer, 4 8 bit Registers or 2 16 bit

2-Zons2-Zons 12/11/2018 at 12:462 Comments

Whew, I am now at a point where I think I can move ahead.  I have worked out a set of instructions (not set in stone) that I think will work.  It's definitely not orthogonal.  Without complicating the design by adding the ability to have 2 instruction registers or greatly simplifying the instruction set, I can't see a way of doing it.

The instruction syntax I am suing is "INStruction Source,Dest"  e.g. MOV A,$D020

I think it has some very useful instructions.  XY Can be used as another stack pointer.  I didn't have to room to allow AB to be used as a pointer directly, so only XY can be used for register indirect instructions.   One instruction it does not have is clear, so no direct way to clear the status register.  You can XOR A with itself (should be 3 cycles) then MOV A,SR (2 cycles). Or if you can't use A, you can XOR a byte in RAM with itself or use a known zero location.

I have yet to receive enough parts to actually start building anything.  I've ordered parts from several different vendors trying to get the best prices.   With all the shipping charges though I'm not sure If I actually saved anything. 

I have in instruction matrix on the google docs spreadsheet

https://docs.google.com/spreadsheets/d/1kbxYGDeIOszgvjPYRdes-bELOBlojT_tjxe_RD9MVUQ/edit?usp=sharing

Discussions

2-Zons wrote 12/11/2018 at 22:25 point

As usual @roelh , much appreciated feedback.  The opposing jumps were definitely an oversight.  I will take your advice on the XNR.  I didn't like the abbreviation anyway.  I will also update the spread sheet to show which combinations do  16 bit transfer of data.  

I originally had an immediate indirect (if I am using the right terminology) addressing mode so you could use a memory location as a pointer, but there simply isn't enough room to add all those combinations.

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roelh wrote 12/11/2018 at 15:20 point

This looks good, Martin ! Just a few questions/remarks:

- To me, there is nothing wrong with the orthonality (except, I miss jumps for the opposite condition)

- The XNR instructions could be removed if you need more codes. Almost no other processor has them.

- Nice to see that there are memory-to-memory instructions. Are these 8 or 16 bit ?

- The spreadsheet format is quite good, it shows which instructions are present and which are not.

- It would be helpful if the instructions that handle 16 bit data have another color

The MOV instructions can use XY as stack pointer. Nice that the caller can put parameters on the XY stack, and the subroutine can pop them without having the return address sitting in the way, because that is saved on the SP stack. Would be even nicer if the most used operations, like ADD and SUB, could directly get their argument from stack (now they have (XY) but no (-XY) )

There are other things possible, like Z-page mode or relative branches, but in the end an ISA is also a matter of personal taste. 

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