When creating a CPU out of transistors, the first thing one needs to do is pick a design for basic logic gates. I chose NMOS logic with 2N7000 MOSFETs. MOSFETs are nice because they don't require any current limiting resistors at the gate, since current flow from gate to source is basically zero. This reduces the total number of components and simplifies the design. The schematics for an inverter, a NAND gate, and a NOR gate are shown below:

The resistor value was chosen to keep the total power consumption of the Spikeputor in the light bulb range (25 Watts). Each logic gate in the CPU can consume V^2/R watts when all inputs are ON. That's about 5 mW per gate, and the Spikeputor will have on the order of 5,000 gates. Lower resistor values would speed up the gate switching time, but at the expense of greater power use. Based on modeling and measurements on actual circuits, I estimate that the maximum clock speed of the Spikeputor will be on the order of tens of thousands of hertz. Since the point of the Spikeputor project is to visualize computation, that's more than enough. Plus, getting up into hundreds of thousands of hertz clock speeds would require an order of magnitude decrease in resistance, bringing the Spikeputor total power consumption into the hair dryer range (250 Watts). Although all of these values are order of magnitude estimates, and we'll see the actual power consumption and speed as the thing gets built, I feel comfortable with these design choices.