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Second sprite controller

A project log for Lion FPGA CPU/Computer

A 16-bit FPGA CPU I call Lion CPU and a computer, the Lion computer. Everything built from scratch.

LeonLeon 01/03/2019 at 16:190 Comments

Added a second parallel sprite engine so now 28 sprites are available for mode 1 in 8k sprite ram. It is synchronized using the vertical synch signal with the video controller that generates the first 14 sprites. Sprite ram is now split in two 4k independently addressed units so each sprite controller has its own ram. Sprite ram is mapped in I/O space at address 16384.

I can any time easily add one or two more sprite controllers to have 42 or 56 sprites.

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