I've taken a few swipes at this, but think I finally have it nailed. Here's a tested recipe for 50-Ohm coplanar waveguide traces on OSH Park's 4-layer stackup.
The ground plane for this line is on layer 2, i.e. 6.7 mils below the top layer.
I set the gap to 6 mils somewhat arbitrarily. It's a little bigger than the minimum 5 mil gap in the OSH Park 4-layer design rules, but still small enough to matter for a coplanar waveguide.
To get an estimate of the proper width, I first consulted a number of on-line or application-based calculators. I used an Er value of 3.66 for all calculations. Here is a summary of what they suggest for a 50-Ohm trace:
- Chemandy Electronics: 13.6 mils
- KiCAD PCB Calc: 12.55 mils
- Saturn PCB Toolkit: 13.6 mils
- AppCAD: 12.55 mils
As you can see, there are a couple of different sets of equations floating around.
Sonnet Lite Simulation
I also ran a test in Sonnet Lite, and produced the following plot of trace impedance vs width. It suggests that 13.4 mils is the correct value.
I had a batch of three boards made at OSH Park. These each had a 13, 13.5, and 14-mil trace to test. I ignored the 12.55-mil result from some of the calculators, assuming that the model they were using was inappropriate for this structure. I have read that some of the equations used in PCB calculators were originally derived in the context of integrated circuit design, and have difficulties with certain PCB structures, but who knows.
There is no soldermask on the lines, so you have to be careful soldering around them. It is easy to bridge them with solder, and even blobbing some non-bridging solder on there will affect the impedance. I covered the traces with Kapton tape before soldering on the SMA connectors. I removed the tape before testing the impedance.
I measured the traces with a Tektronix 11801 sampling scope and SD-24 20 GHz TDR head. You can see the raw 13.5-mil screenshots at the end of this post, but here's a graph summarizing all nine traces. I fit a line to the impedance vs trace width, and it intercepts 50-ohms at a width of 13.4-mils. This is, perhaps not coincidentally, the optimum width suggested by the Sonnet Lite parameter sweep.
You can also get an idea of the deviation you might expect across a larger PCB, maybe on the order of a few tenths of an Ohm. I have no idea what the batch-to-batch variation will be like, and at $24 for a set of three PCBs, I'm not going to gather stats on it at the moment.
What About Soldermask?
So, this is a dilemma. The OSH Park 4-layer stackup uses FR408 substrate with well-defined properties to achieve repeatable high-performance. The dielectric has a known and predictable Er. The soldermask applied over the top does not have a known and predictable Er, and I suspect that the thickness is not terribly well-controlled, either. Soldermask in the gaps of coplanar waveguide will decrease the characteristic impedance of the trace. How large this decrease is depends on the CPWG structure and the nature of the soldermask. On 2-layer PCBS, I have seen the impedance decrease by a few Ohms when soldermask is applied. On the 4-layer version, since the gaps are wider compared to the dielectric thickness, soldermask should have less of an impact.
Then, there's loss. I don't have any data on the loss tangent for soldermask, but I'm guessing it isn't great. But, there's not too much of it involved, I guess, so it may not make a huge difference.
So, the effect is probably "small" but a little unpredictable. On the other hand, without soldermask, the trace is subject to environmental contamination, which can also affect the trace impedance. It's a tough call.
I guess I should make a test board to see what happens.
Here are screenshots of the three 13.5-mil traces -- one on each board. You can see where I had to exercise a little judgement in placing the cursor to read off the impedance. I keep thinking I should write some code to grab the raw data off this scope, but in this case, it's probably overkill. So, I should definitely do it.
Another thing. Those inductive impedance bumps on either side are from my SMA connector footprint. They bump up to around 56 Ohms, which didn't look too bad a while ago, but is starting to look like a problem. Maybe time to send out a test PCB with some different footprints.