After a frustrating few days, the rosco_m68k is now successfully running code from the EEPROMs! It turns out I'd wired the ROMs to the wrong half of the data bus (facepalm, endianness again), and also needed to make a few other tweaks to get it working.
The board currently looks like this (with a few not-yet-permanent fixes):
The key differences are:
DTACK is no longer grounded. The upper left breadboard in the picture contains a (temporary, but possibly soon to be permanently wired on the main board) DTACK generator based on a 74LS93 binary counter (in 3-bit mode) and a NOR gate. This is driven by the AS line (which drives the counters reset line) and the CLK, with DTACK being generated by the negated output of Q1, Q2 or Q3 depending on how long the delay needs to be (hardwired configuration right now).
Theres also an extra breadboard plonked on top of the main board in this pic, which is just a bank of resistors that are weakly pulling the data bus high.
Both of these changes are attempting to improve reliability. While the system does properly boot every time and starts running code, it occasionally wandered off into the wilderness and ended up double faulting (and asserting the HALT line).
The DTACK generation seems to have helped quite a bit in this regard - without it, the system felt a lot less reliable that it does with it. Sadly though it's still not 100% - although it will often run for several minutes it usually ends up halting for some reason.
But for now, I'm just happy it's doing anything at all - I've been a few days figuring out what was going wrong, and with only 8 channels on my logic analyzer it's been a challenge to try and see what the various bus lines were doing.