Here you see the schematic of the four address registers, with the five 74HC670 chips.
Each address register holds 20 address bits. The four address registers are called PC, WP, X and Y.
Loading the address register
The inputs (REG0-REG15) come from the accumulator. The address register to write to is selected with the WA and WB inputs (that connect to bit IR4 and IR5 of the microcode byte). When ADDR_WE is active (low) the data is written into the selected address register.
The upper four bits (16-19) of the address register are written when ADDR_PAGE_WE is active.
Output of the address registers
The five 670's always put an address on the address bus (A0-A19), because the GR signal is always active [edit: in a newer version, the outputs can be tri-stated]. When the USE_XY signal is low, the PC or WP is connected to the bus (selected with bit IR4 from the microcode). When USE_XY is high, the X or Y register is connected to the bus, also selected with IR4.
Adding the displacement
At the upper right you see five OR-gates that "add" a displacement to the address. The lower four bits of the displacement come from the microcode byte. The fifth bit (DISPL4) comes from the control section. Since the displacement is not really added, it only works if the address in the address register is properly aligned. Alhough a four bit adder chip could have been used for the A1-A4, this only moves the problem when that adder has a carry. But having more than one adder chip here is against the minimum parts philosophy of the project.
The upper signals AP0-AP4, together with A5-A8 can be connected to the adder in the ALU. This connection is used for incrementing the PC. Only the lower byte of the PC is incremented. To cross a 256-byte boundary, an explicit instruction will be needed.