So here's something the average build does not have:

A thread running in the background continuously checking the integrity of the flash memory!

So while your high performance powertrain is crunching numbers, running a 30kHz control loop, communications, fault management, and perhaps simulating a motor, it is also checking the integrity of the flash memory in the background, crawling along the whole flash map making sure the hardware-accelerated CRC calculations perfectly match the expected values. If they are not, board is reset.

After reset, another full integrity check is performed, if it fails the firmware will loop forever making sure your corrupted binary does not do any damage!

Background checking is inspired in a safety-related app note:

It runs on a low priority thread on the RTOS, at light OS loads it looks like this (note persistance is ON to see the jitter), crunching a 8kB CRC block in ~300us.

 

When you really push VESC with many hard realtime tasks, this thread takes the back seat for a while and takes about 1ms to compute.

Overall, flash memory integrity check task looks like this

After merging a couple of days ago with the VESC master branch the checker settings got a bit tuned, now it calculates 1kB chunks at a time, every 6 milliseconds.

With any other VESC out there a a flash memory failure would definitively brick your board, but not with an Axiom! This control board lets you use a ROM-based DFU bootloader, so if you brick the board, just connect Axiom to your computer over the USB interface (no uart adapter required) and load a new image directly with an dfu loader program (one-liner in linux, a few clicks away in windows).

Pull Request discussion here:

https://github.com/vedderb/bldc/pull/87

And just like Formula 1, this high end trick is now already available of thousands of small VESC users, just a firmware-upgrade away.

Well, I guess now the average vesc build does have this neat feature.