2020-05-01 status

A project log for Kilsyth: ECP5 FPGA and a USB 3.0 FIFO bridge

An ECP5 FPGA and a FT60x FIFO USB 3.0 bridge. Useful for high speed data transfers to external hardware.

Konrad BeckmannKonrad Beckmann 05/01/2020 at 09:260 Comments

This project has not gotten a lot of my attention since I made the first rev and initial bringup.

However, people seem to find their way here and I thought I'd just leave a note about the current status of the project.

This board was designed in a rush, in order to get it done for 35C3, 2018-12-27. The goal was to have a cheap ECP5 board with a high speed PC interface and a bunch of IOs.

What is working?

What needs to be fixed?



I started working on a RevB but haven't really done any progress since I got stuck trying to figure out which high speed connectors to use. HDMI, SATA, USB-C, SYZYGY ...

At this point this project is pretty much on hold indefinitely. I started a dedicated HDMI capture/transmit project here, however after I learned about the Camlink and the reverse engineering progress that has already been made with that, there is no point in continuing that project.


I made another board for 36C3, 2019-12-27, called pergola. That project is very much alive, please check it out instead. project page.