07/09/2019 at 15:06 •
When starting the project I actually used die shots which were much worse
than the ones I use now (for other projects):
Although picture quality is quite embarrassing I could get use them because of
their similarity. That means: MOS/CSG really re-used chip masks which can
clearly be seen here.
07/05/2019 at 15:04 •
Sometimes insomnia is good... some results from yesterday night:
At least it's more than good enough for conversion to netlist.
07/02/2019 at 12:38 •
lazybusy in the last weeks... mainly stitching upcoming die shots
which I had to verify/check in time for errors for future projects. (Hint hint: Stay tuned!).
Anyway I redid (stitching) the MOS6509R7 just for fun:
Well... to be honest:
Actually there was no point doing the MOS6509R7 again as I already
reversed the relevant parts. In fact I did it not for fun but in order to improve
my workflow and to speed up development by using the vectorized die shot
directly for simulation.
05/17/2019 at 07:52 •
2019-05-16: Received 4 new prototypes... first tests via boundary-scan showed that circuit design is working...