Background:
My homemade seismometer uses a fully differential capacitance displacement sensor to detect the movement of the earth. The sensor interface is an AD7745 capacitance-to-digital converter. The AD7745 has some advantages:
- It's easy to interface. It provides excitation drivers and can interface directly with a fully differential capacitance bridge.
- It's low power -- less than 1mA supply current.
- It uses the I2C interface for communication.
- Relatively inexpensive at $11 or so in low quantities.
And disadvantages:
- The AD7745 was released around 1995 and is showing its age relative to other high-bit ADC converters.
- Advertised as a 24-bit converter, it can only really produce about 16-bits of noise free resolution.
- Susceptible to EM interference because there is no input filtering.
- It's not ratiometric. It relies on a 1.17V internal voltage reference.
- Pretty poor tempco of the converted capacitance.
A chopper-stabilized sensor interface:

See the log files for all the details. The system uses a square wave modulator to drive the top and bottom of the capacitor sensor bridge between zero and VCC (the supply voltage). The maximum differential capacitance that the sensor can develop across the output is ±4pF when the displacement is ±5mm. At zero displacement all of the capacitors in the bridge are 2pF and the differential output capacitance is zero.
V(OUT+ - OUT-) = Vout = 2VCC ∆C/C1
If C1 = C2 = 10pF, Max Vout = ±0.8VCC.
If this output is fed to a 24-bit ADC using VCC for its reference (ratiometric conversion) then it should be able to produce a noise free resolution approaching 22bits (>130dB dynamic range). If theory matches reality then the capacitor sensor should be able to improve the displacement sensor performance by a factor of about 10x-30x, which would allow it to resolve displacements of less than 10nm. But that's still a long way from a professional instrument's capability.
This is the circuit I’ve designed to implement the concept.

The 100kHz clock generator for the modulation is a PIC10F202 — a 6 pin micro controller with an accurate internal clock. The exciters are driven by two Schmitt trigger inverters. The AC amplifiers are TP07 (or OPA376) opamps biased at TBD VCC. The SPDT switches are Vishay DG3157E -- which have low charge injection (<2pC).
I found a 24-bit sigma-delta ADC with decent noise performance — the MAX11200. When sampling at 245kHz (decimated to 5 Hz) the ADC is expected to have a noise free resolution of 21 bits — that’s a noise floor of 3.45µV p-p when using a 3.6V VREF ( input range = ±0.8VCC = 5.76V).
The LP2985 LDO has a bypass cap to reduce the noise on VCC. I'm pretty paranoid about noise on this circuit.
One last thing: This approach would lend itself to a force balance wide-bandwidth type seismometer.