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Portable North American Power

220 VAC 50 Hz -> 120 VAC 60 Hz 15W

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We here in North America are blessed with quite a versatile electric power system. I'll set aside all of the history behind it and just leave it at being a split-phase 240 (nominal) VAC system at 60 Hz. Most household devices wind up connected to one of the two resulting hot lines, using the center-tap of the split phase transformer output as a neutral (the neutral is grounded at one point in the premises). High power appliances typically are wired to both hot lines through a two-pole breaker to get 240V.

This is not how things work elsewhere in the world. In Europe, the dominant power is 220VAC hot-neutral at 50 Hz.

Most things can be made to work on a different voltage, but some things care about the frequency. This project aims to cater to them.

Most electronic things nowadays start with an AC/DC converter, and those are almost always insensitive to line frequency (most also will operate on damn near any world-wide voltage). But some devices exist that are sensitive to frequency. In particular, vintage synchronous clocks or phonographs or what not might run 8.3% slow when run on European power.

This project aims to supply 15W of 120VAC at 60 Hz, with the 60 Hz frequency controlled by a software PLL from the incoming 50 Hz frequency. This will allow the frequency discipline imposed on the source grid to be reflected on the output.

The circuit starts with a 1:1 isolation transformer rated for 20+ VA with a center-tapped secondary. Isolating the incoming power is done for safety more than anything. The center tap of the secondary is grounded and also forms the neutral for the resulting output circuit.

The two output legs go to a bridge rectifier and a big, beefy filter cap. The result is a bipolar 155 volts or so unregulated DC supply. Unfortunately, this is a little bit low, as the AC peak voltage for 120 Vrms is 170V. But 155 Vpeak in RMS is just under 110 volts, which for most purposes should be close enough.

To turn that bipolar supply back into AC, we'll us a push-pull transistor pair. The transistors will need to be rated for a Vce of over 400V, so they'll need to be pretty sturdy, but since the circuit is only going to supply 15W, they only need to be rated for maybe a minimum of 250 mA.

The two pass transistors will be fed a synthesized 60 Hz sine wave generated from the PWM output of a micro controller. The controller will be fed a 50 Hz pulse train derived from the source.

To get that 50 Hz pulse train, you start with another transformer, this one a step-down one with a 6v secondary. One leg of the secondary is grounded and the other fed through a rectifier diode. From there, it goes to the input of a comparator that's configured with hysteresis. The output of the comparator will be a square wave with probably a weird duty cycle, but all that matters is that the rising edges will be at the incoming 50 Hz nominal line frequency.

The controller will have a 256 byte sine wave table. One of the internal timers will be set up to generate a 60*256, or 15.36 kHz interrupt. The incoming 50 Hz signal will be used to trigger a capture of this timer value and the difference between successive captures should be 307 counts (15360/50 = 307.2), nominally. If it isn't, then the counter's cycle count will be incremented or decremented as appropriate. The result will be a free-running sine wave whose frequency is adjusted to keep it locked to the incoming 50 Hz.

The output of the push-pull transistor pair goes to a 125 mA fuse and then to the hot line of a NEMA 5-15 outlet. The neutral and ground lines are tied together and to the circuit ground and hence to the incoming power ground.

  • Timer math

    Nick Sayer06/15/2019 at 17:49 1 comment

    The ATTiny85 can run at 8 MHz without an external crystal. Of course, that 8 MHz isn't terribly accurate, but it doesn't have to be. Recall that we have a 256 byte sine table and we want to run the whole table through at 60 Hz. That's a sample rate of 60 * 256, or 15.36 kHz. If we clock the timer at the 8 MHz system clock, that's a nominal counter value of 520.8333. Unfortunately, the timers are only 8 bit, so we have to prescale the clock by 4, which means the nominal counter value will be 130.208333. So the PLL should, if the clock frequency is accurate, flip between 130 and 131. The counter overflow will trigger an interrupt that will update the other timer, which will be configured for PWM output of the sine wave. So there will be an in-memory value that counts through all 256 samples of the sine table.

    Successive 50 Hz interrupts should see the sample pointer value move 6/5th of the way through the sample table, or 307.2 places (we can track the 15.36 kHz interrupts with an int and mask off the lower byte to index into the sine table). If the actual value is higher than 307, then we can increase the cycle length of the main counter and if it's 307 or lower, we can decrease it. The result will have some amount of jitter in it, but that jitter should be buried in the 256 samples of the 60 Hz sine output.

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