The ATTiny85 can run at 8 MHz without an external crystal. Of course, that 8 MHz isn't terribly accurate, but it doesn't have to be. Recall that we have a 256 byte sine table and we want to run the whole table through at 60 Hz. That's a sample rate of 60 * 256, or 15.36 kHz. If we clock the timer at the 8 MHz system clock, that's a nominal counter value of 520.8333. Unfortunately, the timers are only 8 bit, so we have to prescale the clock by 4, which means the nominal counter value will be 130.208333. So the PLL should, if the clock frequency is accurate, flip between 130 and 131. The counter overflow will trigger an interrupt that will update the other timer, which will be configured for PWM output of the sine wave. So there will be an in-memory value that counts through all 256 samples of the sine table.
Successive 50 Hz interrupts should see the sample pointer value move 6/5th of the way through the sample table, or 307.2 places (we can track the 15.36 kHz interrupts with an int and mask off the lower byte to index into the sine table). If the actual value is higher than 307, then we can increase the cycle length of the main counter and if it's 307 or lower, we can decrease it. The result will have some amount of jitter in it, but that jitter should be buried in the 256 samples of the 60 Hz sine output.