• Deep sleep and RTC

    AIFanatic6 days ago 0 comments

    3-Aug-2018

    With the battery implemented it makes sense to use the deep sleep capabilities of the ESP32. This would make the battery last up to months with a single charge. This estimates are heavily dependent on how long the device is awake for. The workflow is as follows: 

    1. Tickers view is shown 
    2. Store necessary state
    3. Go into deep sleep for "ticker scroll frequency"
    4. Wake up
    5. Restore state

    6-Aug-2018

    Some quick measurements about the device consumptions and other metrics:

    Display Consumption3mA
    Battery capacity500mA
    Device Consumption85mA
    Peek Consumption150mA
    On time2sec

    Theoretical battery estimates:

    Updates per dayHourly Consumption / mahDaily consumption / mahBattery last / days
    10.051.13441.18
    20.092.27220.59
    30.143.40147.06
    40.194.53110.29
    60.286.8073.53
    120.5713.6036.76
    241.1327.2018.38
    36017.00408.001.23
    130061.391473.330.34

    9-Aug-2019

    In order to maintain a state during deep sleep cycles the ESP32 has another CPU (ULP) and RAM (RTC)
    that stay awake during deep sleep, all other peripheals are turned off (depending on the sleep mode).
    These are ultra low power components that, as expected, are very limited.
    An alternative to using RTC would be to use SPIFFS but its best to avoid constant writes to it since it has a limited number of write cycles.
    With the current approach, the total boot time needs to be maintained during sleep cycles in order for the tickers
    to function properly.
    RTC is only able to store uint16's so two addresses have to be used in order to store a long (epoch time).

    12-Aug-2019

    The device outperforms the theoretical charts by a lot, more tests are required but it lasted more than 16h on a single charge (~30% battery left) with 10sec scroll time and 60sec update rate.

    One persistent issue is the speaker pop sound on power on/power off cycle. This seems to be caused by noise or unfiltered outputs on the chip NS4148 (3w amplifier). The chip has a sleep mode pin which should reduce the pop sound but its currently connected to 3V3 thus not being available to the ESP32. For now the N Speaker wire was soldered to pin IO27 in order to control when the speaker is on. A big downside is that this essentially renders the amplifier useless making the speaker around half as loud. 

  • Adding a battery

    AIFanatic08/02/2019 at 12:35 0 comments

    16-Apr-2019

    A battery would complement the device very well and after some research here is some info.

    • In order to not change the case design a maximum battery capacity is around 500mah, this should be enough with deep sleep implemented.
    • According to the schematics found at https://github.com/lewisxhe/TTGO-Electronic-Badge/blob/master/schematic/T5_V2.2.pdf the VBAT pin is not connected to the ESP32 so a "manual" connection has to be made, possibly to pin IO34.
    • The GPIO on the ESP32 works at a 3.3v level and the battery is 3.7v (4.0v while charging) so a voltage divider has to be added to the board in order to bring the voltages down.
    • The board already has a charging circuit but the charging LED (or any charging signal) is not available in the GPIO header, so either "charging mode" is detected by voltage increase on VBAT or "LED_G LED0603 BLUE" has to be remapped to the available GPIO.

    14-May-2019

    • In addition to the VBAT pin the charging pin (VBUS/CHRG) is hardwired to the onboard USB which will be hard to get around without some hackish solutions. Ideally a vertical USB connector would replace the existing one thus removing the need for an extra USB.
    • The cases are likely to be reprinted since the battery barely fits the existing model. A 2mm increase in depth should be enough to accommodate the battery nicely.
    • The device consumes ~85mA while powered, peaking to ~150mA when pulling data.
    • In deep sleep mode the device consumes 7mA which is higher than the researched values of around 10μA (https://lastminuteengineers.com/esp32-sleep-modes-power-consumption/). This is likely to be related with the onboard LED's (charding and power) that are always powered on. Ideally these would be removed in order to save power.
    • Software wise, deep sleep can be implemented with ease and a prototype has been sketched out. The network connection and deep sleep functionality have to ported out of "Manager" into the modules that require it (eg: TickerView). The "Manager" module has to store the current view in RTC in order to be aware of what view the module is at since the CPU and RAM are powered off in deep sleep.

    28-Jul-2019

    • A new board has been manufactured which includes the following changes:
      • Remove SM_20PIN header.
      • Replace SM_20PIN pads with PCB through-hole.
      • Remove MICRO_USB_SMT.
      • Replace MICRO_USB_SMT pads with PCB though-hole.
      • Remove LED_G LED0603 BLUE (charging LED)
      • Remove LED_G2 LED_G LED0603 GREEN (power LED)
      • Connect VBAT with pin 13 on SM_20PIN (IO34).
      • Connect CHRG on TP4054 with pin 14 on SM_20PIN (IO33)
      • Connect RED LED to pin 12 SM_20PIN (IO26)