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ALU Optimisations - final amendment hopefully

A project log for SPAM-1 - 8 Bit CPU

8 Bit CPU in 7400 with full Verilog simulator and toolchain

john-lonerganJohn Lonergan 06/19/2020 at 00:460 Comments

Updated the ALU operations to allow me to select whether I want the addition/subtraction ops to take carry-in into account.

I'm also going rewrite my ALU verilog so it's actually ROM based as that's what the physical impl will be. I expect that that approach will make automated testing of the logic easier too.

More details here: https://github.com/Johnlon/spam-1/blob/master/docs/alu_with_carry_in.md

Updated ops are:

0-7 ALU Ops8-15 ALU Ops16-23 ALU Ops24-31 ALU Ops
0B-1A*B (high bits)A ROR B
AA+B*1A*B (low bits)A AND B
BA-B*1A/BA OR B
-AB-A*1A%BA XOR B
-BA-B (special)A << BNOT A
A+1A+B+1*2A >> B arithmeticNOT B
B+1A-B+1*2A >> B logicalA+B (BCD)
A-1B-A+1*2A ROL BA-B (BCD)

*1 these ops will be used if the instruction directly selects ops 9/10/11, or, when the instruction selects 13/14/15 but carry-in is not set
*2 these ops are selected when the instruction is selecting ops 13/14/15 and carry-in is set; if carry-in is not set then see *1

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