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Single Cycle CPU Confusion

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john-lonerganJohn Lonergan 07/19/2020 at 23:530 Comments

I was writing up some design/research notes on timing considerations and I was considering whether it was possible to update async RAM in a single cycle.

I have heard the term "Single Cycle Cpu" and was trying to understand what single cycle cpu actually meant. Is there a clear definition and consensus and what is means?

The home brew "single cycle cpu's" I've come across seem to use both the rising and the falling edges of the clock to complete a single instruction. Typically, the rising edge acts as fetch/decode and the falling edge as execute. 

However, in my reading I came across the reasonable point made here ...  https://zipcpu.com/blog/2017/08/21/rules-for-newbies.html    

     "Do not transition on any negative (falling) edges. Falling edge clocks should be considered a violation of the one clock principle, as they act like separate clocks.".

This rings true to me. Changing state on the rising and falling edges (or high and low phases) is effectively the same as changing state on the rising edge of two cycles of a clock that's running twice as fast; and this would be a "two cycle" CPU wouldn't it. 

So is it honest to state that a design is a single cycle CPU when both the rising and falling edges are actively used for state change?

It would seem that a true single cycle cpu must perform all state changing operations on a single clock edge of a single clock cycle.

I can imagine such a thing is possible providing the data strorage is all synchronous. If we have a synchronous system that has settled then on the next clock edge we can clock the results into a synchronous data store and simultaneously clock the program counter on to the next address. But if the data store is async then the control lines would be changing whilst that data is being stored leading to unintended behaviours.

Am I wrong, are there any examples of such that include async storage in the mix?

It would seem that using async RAM in ones design means one has at least "two clock cycles".

Of course, with some more complexity one could perhaps add an extra cycle when accessing async data strorage, but again that still wouldn't be a single cycle cpu, rather a mostly single cycle cpu.

So is there a commonly accepted single cycle CPU and are we applying the term consistently? 

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