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Playing with the DM85S68 16x4 synchronous register file

A project log for SPAM-1 - 8 Bit CPU

8 Bit CPU in 7400 with full Verilog simulator and toolchain

john-lonerganJohn Lonergan 07/25/2020 at 23:190 Comments

The DM85S68 is an oldie. I came across it when researching register files for SPAM1 and when I bought a few 74HCT670's I also bought a few DM85S68 too (at least I hope they're not counterfeit).

Unlike the 74HCT670, which is entirely asynchronous, the DM85S68 has a synchronous load and an async read. This means it's probably better suited to my needs than the 74HCT670. Where I've designed around the 670 I've had to add a 74HCT574 to latch the data input because without this then the register file and the ALU would be a big combinatorial circuit with a feedback loop; not good.

Also, the 74670 is a 4x4 register, vs the 16x4 DM85S68, so whilst I'm only building 4 registers then that's immaterial, but if I went for the full 8 registers my addressing permits at the moment then perhaps the DM85S68 is a better choice. 

The big downside perhaps of the DM85S68 is that it's supply current is rated as 70mA typical compared to the 74HCT670 which will use a fraction of that.

The logic diagram is shown below and you can see that the output stage is interesting in that it contains a latch.

The output latch appears to be some kind of SR latch. I also had a go at simulating it CircuitVerse and also in Falsted.

I won't use DM85S68  immediately as I'd need to create a verilog model for it - but it's definitely on the todo list for a variation.

You can find the DM85S68 datasheet here 

https://www.datasheetarchive.com/pdf/download.php?id=96fbc3fe56bdaed595c8bb5f81c37e1b016adc&type=M&term=DM85S68  and also some original design ideas in this old data book  http://www.bitsavers.org/components/national/_dataBooks/1978_National_Memory_Applications_Handbook.pdf

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