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Control and ROM underway

A project log for SPAM-1 - 8 Bit CPU

8 Bit CPU in 7400 with full Verilog simulator and toolchain

john-lonerganJohn Lonergan 02/07/2021 at 04:280 Comments

Finally getting progress again but not without setbacks. I had the ROM address lines all hooked up but then tore them out again today when I realised the next change I was about to make wouldn't fit.

I've decided to put the ROMs in ZIF sockets. But the existing chip position didn't leave enough  space for the bigger footprint of the ZIF so I tore out the wriring and moved stuff around.

Even now the ZIF will not fit  because it's wider footprint will collide with the wires. But I think I have fixed this with a trivial extender adaptor board for the ZIF so it sits proud of the breadboard. 

The adaptor is https://hackaday.io/project/177325-zif-socket-adapter and the idea is that it puts the ZIF on stilts by using very long pin headers to attach to the breadboard. To be honest in retrospect this would have been pretty easy on veroboard rather than getting PCBs made up.

Maybe 25% of control logic done.

Getting closer to integration!?

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