Getting back to wiring up SPAM-1.

It recently executed it's first "hello world" program compiled from SPAMCC it's C-like high level language - this hello world responded to key presses on the UART stream by piping back "Hello World" to the serial monitor. At present SPAM-1 has no RAM or registers wired, though they are built as you will see in the latter half of this video on the rigth hand side. The lack of RAM/registers means SPAM-1 can't really do much else yet but this proves out that the control logic, timing, decoding and conditional instructions are working fine so far. 

The hardware around the UART did something strange though - it printed random repeats of the characters I was sending back to the serial monitor. What was actually happening was that an oscillation was setup due to the combination of the gating of a UART /WE input signal with the UART TXE output signal, plus, the particular opcode that I was using to detect that it was valid to write. This feedback loop was easily fixed, however I was surprised (annoyed) because I'd not seen the same behaviour in the Verilog simulation so I went back and looked closer. I was even more surprised to see that I had forgotten that one of my existing test programs for the UM245R verilog model actually demonstrated and relied on this same oscillating behavior - which was comforting in a bizarre sort of way as it showed the hardware and model to actually match.     

Everything needs wiring into the bus cable now.