This is very early in the project. So far I’ve designed the board and built up a couple for prototyping. I’m currently working on the firmware for the STM32 and once I’m happy with that I will be moving on to developing a PC application to allow downloading the software to the EPROM.
The board contains a 512K 8-Bit SRAM chip which the EPROM data will be loaded on to. A 40 pin header connects to a second board via a ribbon cable which is then plugged into the EPROM socket on the target board. The emulator supports both 5V and 3.3V operation.
A STM32F030 is used to control the operation on the board. The theory of operation is that the target board is put into a reset state using a link from the 2 pin header. Access to the SRAM address and data buses are enabled through the 74AHC245 buffers. Address lines are set using 74AHC595 shift registers and the data lines are connected directly to the IO pins on the STM32.
Data is then read from the PC serial connection (FT232R) and loaded into the SRAM. Once this is complete then the address and data lines are tri-stated by the buffers and the target system is taken out of reset allowing it to access the RAM.