Version one worked but I hadn't realised how much crappy SPI stuff there is that doesn't properly get off the MISO line when not selected.

This version seems to work although I managed to end up with two unconnected power nets and some upside down chip labels. With those fixed and tested with wires I've uploaded the corrected Kicad schematic and PCB files but not yet tested the changes.

The theory is fairly simple. The two original CS lines go into both the 74HCT138 and the 74HCT153. The 74HCT138 in turn sets one of the four CS lines low. Ports 1 and 2 correspond to the original intended ports, whilst port 0 and 3 are extras. There is no 'not connected' so you need a device that doesn't mind being used as a 'parking' chip select on Port 3 (or leave it empty).

The 74HCT153 handles the MISO line the same way but in reverse, it multiplexes the four MISO lines from the devices onto the MISO line to the mainboard.